add new target 'oxnas'

[openwrt.git] / target / linux / oxnas / patches-3.18 / 320-oxnas-irqchip.patch

diff --git a/target/linux/oxnas/patches-3.18/320-oxnas-irqchip.patch b/target/linux/oxnas/patches-3.18/320-oxnas-irqchip.patch
new file mode 100644 (file)
index 0000000..e6262da
--- /dev/null
+++ b/target/linux/oxnas/patches-3.18/320-oxnas-irqchip.patch
@@ -0,0 +1,40 @@
+Index: linux-3.18-rc4/drivers/irqchip/Kconfig
+===================================================================
+--- linux-3.18-rc4.orig/drivers/irqchip/Kconfig
++++ linux-3.18-rc4/drivers/irqchip/Kconfig
+@@ -15,6 +15,11 @@ config ARM_GIC_V3
+       select IRQ_DOMAIN
+       select MULTI_IRQ_HANDLER
+ 
++config PLXTECH_RPS
++      def_bool y if ARHC_OXNAS
++      depends on ARCH_OXNAS
++      select IRQ_DOMAIN
++
+ config ARM_NVIC
+       bool
+       select IRQ_DOMAIN
+Index: linux-3.18-rc4/drivers/irqchip/Makefile
+===================================================================
+--- linux-3.18-rc4.orig/drivers/irqchip/Makefile
++++ linux-3.18-rc4/drivers/irqchip/Makefile
+@@ -28,6 +28,7 @@ obj-$(CONFIG_IMGPDC_IRQ)             += irq-imgpdc.
+ obj-$(CONFIG_SIRF_IRQ)                        += irq-sirfsoc.o
+ obj-$(CONFIG_RENESAS_INTC_IRQPIN)     += irq-renesas-intc-irqpin.o
+ obj-$(CONFIG_RENESAS_IRQC)            += irq-renesas-irqc.o
++obj-$(CONFIG_PLXTECH_RPS)             += irq-rps.o
+ obj-$(CONFIG_VERSATILE_FPGA_IRQ)      += irq-versatile-fpga.o
+ obj-$(CONFIG_ARCH_NSPIRE)             += irq-zevio.o
+ obj-$(CONFIG_ARCH_VT8500)             += irq-vt8500.o
+Index: linux-3.18-rc4/drivers/irqchip/irq-gic.c
+===================================================================
+--- linux-3.18-rc4.orig/drivers/irqchip/irq-gic.c
++++ linux-3.18-rc4/drivers/irqchip/irq-gic.c
+@@ -1044,6 +1044,7 @@ IRQCHIP_DECLARE(gic_400, "arm,gic-400",
+ IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init);
+ IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init);
+ IRQCHIP_DECLARE(cortex_a7_gic, "arm,cortex-a7-gic", gic_of_init);
++IRQCHIP_DECLARE(arm11_mpcore_gic, "arm,arm11mp-gic", gic_of_init);
+ IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init);
+ IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init);
+