mvebu: backport mainline patches from kernel 3.13
[openwrt.git] / target / linux / mvebu / patches-3.10 / 0156-mtd-nand-pxa3xx-Use-extended-cmdfunc-only-if-needed.patch
diff --git a/target/linux/mvebu/patches-3.10/0156-mtd-nand-pxa3xx-Use-extended-cmdfunc-only-if-needed.patch b/target/linux/mvebu/patches-3.10/0156-mtd-nand-pxa3xx-Use-extended-cmdfunc-only-if-needed.patch
new file mode 100644 (file)
index 0000000..7b14da8
--- /dev/null
@@ -0,0 +1,89 @@
+From a701d8e1c4c1e31a208dae616ed9067ba4e90191 Mon Sep 17 00:00:00 2001
+From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
+Date: Mon, 25 Nov 2013 11:02:51 -0300
+Subject: [PATCH 156/203] mtd: nand: pxa3xx: Use extended cmdfunc() only if
+ needed
+
+Currently, we have two different cmdfunc's implementations:
+one for PXA3xx SoC variant and one for Armada 370/XP SoC variant.
+
+The former is the legacy one, typically constrained to devices
+with page sizes smaller or equal to the controller's FIFO buffer.
+On the other side, the latter _only_ supports the so-called extended
+command semantics, which allow to handle devices with larger
+page sizes (4 KiB, 8 KiB, ...).
+
+This means we currently don't support devices with smaller pages on the
+A370/XP SoC. Fix it by first renaming the cmdfuncs variants, and then
+make the choice based on device page size (and SoC variant), rather than
+SoC variant alone.
+
+While at it, add a check for page size, to make sure we don't allow larger
+pages sizes on the PXA3xx variant.
+
+Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
+---
+ drivers/mtd/nand/pxa3xx_nand.c | 31 +++++++++++++++++++++----------
+ 1 file changed, 21 insertions(+), 10 deletions(-)
+
+--- a/drivers/mtd/nand/pxa3xx_nand.c
++++ b/drivers/mtd/nand/pxa3xx_nand.c
+@@ -900,8 +900,8 @@ static int prepare_set_command(struct px
+       return exec_cmd;
+ }
+-static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
+-                              int column, int page_addr)
++static void nand_cmdfunc(struct mtd_info *mtd, unsigned command,
++                       int column, int page_addr)
+ {
+       struct pxa3xx_nand_host *host = mtd->priv;
+       struct pxa3xx_nand_info *info = host->info_data;
+@@ -948,9 +948,9 @@ static void pxa3xx_nand_cmdfunc(struct m
+       info->state = STATE_IDLE;
+ }
+-static void armada370_nand_cmdfunc(struct mtd_info *mtd,
+-                                 const unsigned command,
+-                                 int column, int page_addr)
++static void nand_cmdfunc_extended(struct mtd_info *mtd,
++                                const unsigned command,
++                                int column, int page_addr)
+ {
+       struct pxa3xx_nand_host *host = mtd->priv;
+       struct pxa3xx_nand_info *info = host->info_data;
+@@ -1490,6 +1490,21 @@ KEEP_CONFIG:
+               chip->bbt_md = &bbt_mirror_descr;
+       }
++      /*
++       * If the page size is bigger than the FIFO size, let's check
++       * we are given the right variant and then switch to the extended
++       * (aka splitted) command handling,
++       */
++      if (mtd->writesize > PAGE_CHUNK_SIZE) {
++              if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370) {
++                      chip->cmdfunc = nand_cmdfunc_extended;
++              } else {
++                      dev_err(&info->pdev->dev,
++                              "unsupported page size on this variant\n");
++                      return -ENODEV;
++              }
++      }
++
+       if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370)
+               ret = armada370_ecc_init(info, &chip->ecc,
+                                  chip->ecc_strength_ds,
+@@ -1569,11 +1584,7 @@ static int alloc_nand_resource(struct pl
+               chip->read_buf          = pxa3xx_nand_read_buf;
+               chip->write_buf         = pxa3xx_nand_write_buf;
+               chip->options           |= NAND_NO_SUBPAGE_WRITE;
+-
+-              if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370)
+-                      chip->cmdfunc = armada370_nand_cmdfunc;
+-              else
+-                      chip->cmdfunc = pxa3xx_nand_cmdfunc;
++              chip->cmdfunc           = nand_cmdfunc;
+       }
+       spin_lock_init(&chip->controller->lock);