--- /dev/null
+--- a/drivers/net/ethernet/freescale/gianfar.c
++++ b/drivers/net/ethernet/freescale/gianfar.c
+@@ -1016,7 +1016,16 @@ static int gfar_probe(struct platform_de
+ /* We need to delay at least 3 TX clocks */
+ udelay(2);
+
+- tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
++ if ((mfspr(SPRN_SVR) & 0xffff) >= 0x0011) {
++ tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
++ } else {
++ /*
++ * Do not enable flow control on chips earlier than rev 1.1,
++ * because of the eTSEC27 erratum
++ */
++ tempval = 0;
++ }
++
+ gfar_write(®s->maccfg1, tempval);
+
+ /* Initialize MACCFG2. */