ipq806x: update target to v3.18

[openwrt.git] / target / linux / ipq806x / patches / 0155-clk-qcom-Fix-incorrect-UTMI-DT-include-values.patch

diff --git a/target/linux/ipq806x/patches/0155-clk-qcom-Fix-incorrect-UTMI-DT-include-values.patch b/target/linux/ipq806x/patches/0155-clk-qcom-Fix-incorrect-UTMI-DT-include-values.patch
deleted file mode 100644 (file)
index a05fc2c..0000000
--- a/target/linux/ipq806x/patches/0155-clk-qcom-Fix-incorrect-UTMI-DT-include-values.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 9ab5cb48696dca02bf43170b50d1034a96fb9e85 Mon Sep 17 00:00:00 2001
-From: Andy Gross <agross@codeaurora.org>
-Date: Sun, 15 Jun 2014 00:39:57 -0500
-Subject: [PATCH 155/182] clk: qcom: Fix incorrect UTMI DT include values
-
-Corrected values for UTMI clock definitions.
-
-Signed-off-by: Andy Gross <agross@codeaurora.org>
----
- include/dt-bindings/clock/qcom,gcc-ipq806x.h |   38 +++++++++++++-------------
- 1 file changed, 19 insertions(+), 19 deletions(-)
-
---- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
-+++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
-@@ -273,24 +273,24 @@
- #define USB30_SLEEP_CLK                               262
- #define USB30_UTMI_SRC                                263
- #define USB30_0_UTMI_CLK                      264
--#define USB30_1_UTMI_CLK                      264
--#define USB30_MASTER_SRC                      265
--#define USB30_0_MASTER_CLK                    266
--#define USB30_1_MASTER_CLK                    267
--#define GMAC_CORE1_CLK_SRC                    268
--#define GMAC_CORE2_CLK_SRC                    269
--#define GMAC_CORE3_CLK_SRC                    270
--#define GMAC_CORE4_CLK_SRC                    271
--#define GMAC_CORE1_CLK                                272
--#define GMAC_CORE2_CLK                                273
--#define GMAC_CORE3_CLK                                274
--#define GMAC_CORE4_CLK                                275
--#define UBI32_CORE1_CLK_SRC                   276
--#define UBI32_CORE2_CLK_SRC                   277
--#define UBI32_CORE1_CLK                               278
--#define UBI32_CORE2_CLK                               279
--#define NSSTCM_CLK_SRC                                280
--#define NSSTCM_CLK                            281
--#define NSS_CORE_CLK                          282 /* Virtual */
-+#define USB30_1_UTMI_CLK                      265
-+#define USB30_MASTER_SRC                      266
-+#define USB30_0_MASTER_CLK                    267
-+#define USB30_1_MASTER_CLK                    268
-+#define GMAC_CORE1_CLK_SRC                    269
-+#define GMAC_CORE2_CLK_SRC                    270
-+#define GMAC_CORE3_CLK_SRC                    271
-+#define GMAC_CORE4_CLK_SRC                    272
-+#define GMAC_CORE1_CLK                                273
-+#define GMAC_CORE2_CLK                                274
-+#define GMAC_CORE3_CLK                                275
-+#define GMAC_CORE4_CLK                                276
-+#define UBI32_CORE1_CLK_SRC                   277
-+#define UBI32_CORE2_CLK_SRC                   278
-+#define UBI32_CORE1_CLK                               279
-+#define UBI32_CORE2_CLK                               280
-+#define NSSTCM_CLK_SRC                                281
-+#define NSSTCM_CLK                            282
-+#define NSS_CORE_CLK                          283 /* Virtual */
- 
- #endif