reset_mask &= ~(AR71XX_RESET_GE0_PHY | AR71XX_RESET_GE1_PHY);
ath79_device_reset_set(reset_phy);
- mdelay(50);
+ msleep(50);
ath79_device_reset_clear(reset_phy);
- mdelay(200);
+ msleep(200);
}
ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR);
udelay(20);
ath79_device_reset_set(reset_mask);
- mdelay(100);
+ msleep(100);
ath79_device_reset_clear(reset_mask);
- mdelay(200);
+ msleep(200);
ag71xx_hw_setup(ag);
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
int sent = 0;
int bytes_compl = 0;
+ int n = 0;
DBG("%s: processing TX ring\n", ag->dev->name);
- while (ring->dirty != ring->curr) {
- unsigned int i = ring->dirty % ring->size;
+ while (ring->dirty + n != ring->curr) {
+ unsigned int i = (ring->dirty + n) % ring->size;
struct ag71xx_desc *desc = ring->buf[i].desc;
struct sk_buff *skb = ring->buf[i].skb;
break;
}
- ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS);
+ n++;
+ if (!skb)
+ continue;
- if (skb) {
- dev_kfree_skb_any(skb);
- ring->buf[i].skb = NULL;
+ dev_kfree_skb_any(skb);
+ ring->buf[i].skb = NULL;
- bytes_compl += ring->buf[i].len;
- sent++;
- }
+ bytes_compl += ring->buf[i].len;
- ring->dirty++;
+ sent++;
+ ring->dirty += n;
+
+ while (n > 0) {
+ ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS);
+ n--;
+ }
}
DBG("%s: %d packets sent out\n", ag->dev->name, sent);
ag->max_frame_len = pdata->max_frame_len;
ag->desc_pktlen_mask = pdata->desc_pktlen_mask;
-#ifdef notyet
if (!pdata->is_ar724x && !pdata->is_ar91xx) {
ag->tx_ring.desc_split = AG71XX_TX_RING_SPLIT;
ag->tx_ring.size *= AG71XX_TX_RING_DS_PER_PKT;
}
-#endif
ag->stop_desc = dma_alloc_coherent(NULL,
sizeof(struct ag71xx_desc), &ag->stop_desc_dma, GFP_KERNEL);