ar71xx: allow to use LAN LED on the TL-WA901N/ND boards

[openwrt.git] / target / linux / ar71xx / files / arch / mips / ar71xx / mach-pb42.c

diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb42.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb42.c
index 0379692..1a3d8c5 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb42.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb42.c
@@ -1,7 +1,7 @@
 /*
  *  Atheros PB42 board support
  *
- *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  *
  *  This program is free software; you can redistribute it and/or modify it
@@ -9,60 +9,75 @@
  *  by the Free Software Foundation.
  */
 
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/flash.h>
-
-#include <asm/mips_machine.h>
 #include <asm/mach-ar71xx/ar71xx.h>
-#include <asm/mach-ar71xx/pci.h>
-#include <asm/mach-ar71xx/platform.h>
 
-static struct spi_board_info pb42_spi_info[] = {
-       {
-               .bus_num        = 0,
-               .chip_select    = 0,
-               .max_speed_hz   = 25000000,
-               .modalias       = "m25p80",
-       }
-};
+#include "machtype.h"
+#include "devices.h"
+#include "dev-m25p80.h"
+#include "dev-gpio-buttons.h"
+#include "dev-pb42-pci.h"
+#include "dev-usb.h"
+
+#define PB42_KEYS_POLL_INTERVAL                20      /* msecs */
+#define PB42_KEYS_DEBOUNCE_INTERVAL    (3 * PB42_KEYS_POLL_INTERVAL)
+
+#define PB42_GPIO_BTN_SW4      8
+#define PB42_GPIO_BTN_SW5      3
 
-static struct ar71xx_pci_irq pb42_pci_irqs[] __initdata = {
+static struct gpio_keys_button pb42_gpio_keys[] __initdata = {
        {
-               .slot   = 0,
-               .pin    = 1,
-               .irq    = AR71XX_PCI_IRQ_DEV0,
+               .desc           = "sw4",
+               .type           = EV_KEY,
+               .code           = BTN_0,
+               .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = PB42_GPIO_BTN_SW4,
+               .active_low     = 1,
        }, {
-               .slot   = 1,
-               .pin    = 1,
-               .irq    = AR71XX_PCI_IRQ_DEV1,
-       }, {
-               .slot   = 2,
-               .pin    = 1,
-               .irq    = AR71XX_PCI_IRQ_DEV2,
+               .desc           = "sw5",
+               .type           = EV_KEY,
+               .code           = BTN_1,
+               .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = PB42_GPIO_BTN_SW5,
+               .active_low     = 1,
        }
 };
 
+static const char *pb42_part_probes[] = {
+       "RedBoot",
+       NULL,
+};
+
+static struct flash_platform_data pb42_flash_data = {
+       .part_probes    = pb42_part_probes,
+};
+
+#define PB42_WAN_PHYMASK       BIT(20)
+#define PB42_LAN_PHYMASK       (BIT(16) | BIT(17) | BIT(18) | BIT(19))
+#define PB42_MDIO_PHYMASK      (PB42_LAN_PHYMASK | PB42_WAN_PHYMASK)
+
 static void __init pb42_init(void)
 {
-       ar71xx_add_device_spi(NULL, pb42_spi_info,
-                               ARRAY_SIZE(pb42_spi_info));
+       ar71xx_add_device_m25p80(&pb42_flash_data);
 
-       ar71xx_add_device_mdio(0xffe0ffff);
+       ar71xx_add_device_mdio(0, ~PB42_MDIO_PHYMASK);
 
+       ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
        ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
-       ar71xx_eth0_data.phy_mask = 0x000f0000;
+       ar71xx_eth0_data.phy_mask = PB42_WAN_PHYMASK;
 
+       ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1);
        ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
-       ar71xx_eth1_data.phy_mask = 0x00100000;
+       ar71xx_eth1_data.speed = SPEED_100;
+       ar71xx_eth1_data.duplex = DUPLEX_FULL;
 
        ar71xx_add_device_eth(0);
        ar71xx_add_device_eth(1);
 
-       ar71xx_add_device_usb();
+       ar71xx_register_gpio_keys_polled(-1, PB42_KEYS_POLL_INTERVAL,
+                                        ARRAY_SIZE(pb42_gpio_keys),
+                                        pb42_gpio_keys);
 
-       ar71xx_pci_init(ARRAY_SIZE(pb42_pci_irqs), pb42_pci_irqs);
+       pb42_pci_init();
 }
 
-MIPS_MACHINE(AR71XX_MACH_PB42, "Atheros PB42", pb42_init);
+MIPS_MACHINE(AR71XX_MACH_PB42, "PB42", "Atheros PB42", pb42_init);