ar71xx: flush DDR writeback buffers for WMAC and PCIe on AR934X
[openwrt.git] / target / linux / ar71xx / files / arch / mips / ar71xx / ar71xx.c
index 5d05562..93cbe53 100644 (file)
 #include <linux/module.h>
 #include <linux/types.h>
 #include <linux/mutex.h>
+#include <linux/spinlock.h>
 
 #include <asm/mach-ar71xx/ar71xx.h>
 
 static DEFINE_MUTEX(ar71xx_flash_mutex);
+static DEFINE_SPINLOCK(ar71xx_device_lock);
 
 void __iomem *ar71xx_ddr_base;
 EXPORT_SYMBOL_GPL(ar71xx_ddr_base);
@@ -43,30 +45,47 @@ void ar71xx_device_stop(u32 mask)
        case AR71XX_SOC_AR7130:
        case AR71XX_SOC_AR7141:
        case AR71XX_SOC_AR7161:
-               local_irq_save(flags);
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
                t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
                ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t | mask);
-               local_irq_restore(flags);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
                break;
 
        case AR71XX_SOC_AR7240:
        case AR71XX_SOC_AR7241:
        case AR71XX_SOC_AR7242:
                mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
-               local_irq_save(flags);
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
                t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
                t |= mask;
                t &= ~mask_inv;
                ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
-               local_irq_restore(flags);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
                break;
 
        case AR71XX_SOC_AR9130:
        case AR71XX_SOC_AR9132:
-               local_irq_save(flags);
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
                t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
                ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t | mask);
-               local_irq_restore(flags);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+               break;
+
+       case AR71XX_SOC_AR9330:
+       case AR71XX_SOC_AR9331:
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
+               t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE);
+               ar71xx_reset_wr(AR933X_RESET_REG_RESET_MODULE, t | mask);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+               break;
+
+       case AR71XX_SOC_AR9341:
+       case AR71XX_SOC_AR9342:
+       case AR71XX_SOC_AR9344:
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
+               t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE);
+               ar71xx_reset_wr(AR934X_RESET_REG_RESET_MODULE, t | mask);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
                break;
 
        default:
@@ -85,30 +104,47 @@ void ar71xx_device_start(u32 mask)
        case AR71XX_SOC_AR7130:
        case AR71XX_SOC_AR7141:
        case AR71XX_SOC_AR7161:
-               local_irq_save(flags);
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
                t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
                ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t & ~mask);
-               local_irq_restore(flags);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
                break;
 
        case AR71XX_SOC_AR7240:
        case AR71XX_SOC_AR7241:
        case AR71XX_SOC_AR7242:
                mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
-               local_irq_save(flags);
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
                t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
                t &= ~mask;
                t |= mask_inv;
                ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
-               local_irq_restore(flags);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
                break;
 
        case AR71XX_SOC_AR9130:
        case AR71XX_SOC_AR9132:
-               local_irq_save(flags);
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
                t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
                ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t & ~mask);
-               local_irq_restore(flags);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+               break;
+
+       case AR71XX_SOC_AR9330:
+       case AR71XX_SOC_AR9331:
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
+               t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE);
+               ar71xx_reset_wr(AR933X_RESET_REG_RESET_MODULE, t & ~mask);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+               break;
+
+       case AR71XX_SOC_AR9341:
+       case AR71XX_SOC_AR9342:
+       case AR71XX_SOC_AR9344:
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
+               t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE);
+               ar71xx_reset_wr(AR934X_RESET_REG_RESET_MODULE, t & ~mask);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
                break;
 
        default:
@@ -117,6 +153,54 @@ void ar71xx_device_start(u32 mask)
 }
 EXPORT_SYMBOL_GPL(ar71xx_device_start);
 
+void ar71xx_device_reset_rmw(u32 clear, u32 set)
+{
+       unsigned long flags;
+       unsigned int reg;
+       u32 t;
+
+       switch (ar71xx_soc) {
+       case AR71XX_SOC_AR7130:
+       case AR71XX_SOC_AR7141:
+       case AR71XX_SOC_AR7161:
+               reg = AR71XX_RESET_REG_RESET_MODULE;
+               break;
+
+       case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
+               reg = AR724X_RESET_REG_RESET_MODULE;
+               break;
+
+       case AR71XX_SOC_AR9130:
+       case AR71XX_SOC_AR9132:
+               reg = AR91XX_RESET_REG_RESET_MODULE;
+               break;
+
+       case AR71XX_SOC_AR9330:
+       case AR71XX_SOC_AR9331:
+               reg = AR933X_RESET_REG_RESET_MODULE;
+               break;
+
+       case AR71XX_SOC_AR9341:
+       case AR71XX_SOC_AR9342:
+       case AR71XX_SOC_AR9344:
+               reg = AR934X_RESET_REG_RESET_MODULE;
+               break;
+
+       default:
+               BUG();
+       }
+
+       spin_lock_irqsave(&ar71xx_device_lock, flags);
+       t = ar71xx_reset_rr(reg);
+       t &= ~clear;
+       t |= set;
+       ar71xx_reset_wr(reg, t);
+       spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+}
+EXPORT_SYMBOL_GPL(ar71xx_device_reset_rmw);
+
 int ar71xx_device_stopped(u32 mask)
 {
        unsigned long flags;
@@ -126,24 +210,39 @@ int ar71xx_device_stopped(u32 mask)
        case AR71XX_SOC_AR7130:
        case AR71XX_SOC_AR7141:
        case AR71XX_SOC_AR7161:
-               local_irq_save(flags);
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
                t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
-               local_irq_restore(flags);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
                break;
 
        case AR71XX_SOC_AR7240:
        case AR71XX_SOC_AR7241:
        case AR71XX_SOC_AR7242:
-               local_irq_save(flags);
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
                t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
-               local_irq_restore(flags);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
                break;
 
        case AR71XX_SOC_AR9130:
        case AR71XX_SOC_AR9132:
-               local_irq_save(flags);
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
                t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
-               local_irq_restore(flags);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+               break;
+
+       case AR71XX_SOC_AR9330:
+       case AR71XX_SOC_AR9331:
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
+               t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+               break;
+
+       case AR71XX_SOC_AR9341:
+       case AR71XX_SOC_AR9342:
+       case AR71XX_SOC_AR9344:
+               spin_lock_irqsave(&ar71xx_device_lock, flags);
+               t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE);
+               spin_unlock_irqrestore(&ar71xx_device_lock, flags);
                break;
 
        default:
@@ -157,10 +256,12 @@ EXPORT_SYMBOL_GPL(ar71xx_device_stopped);
 void ar71xx_ddr_flush(u32 reg)
 {
        ar71xx_ddr_wr(reg, 1);
-       while ((ar71xx_ddr_rr(reg) & 0x1));
+       while ((ar71xx_ddr_rr(reg) & 0x1))
+               ;
 
        ar71xx_ddr_wr(reg, 1);
-       while ((ar71xx_ddr_rr(reg) & 0x1));
+       while ((ar71xx_ddr_rr(reg) & 0x1))
+               ;
 }
 EXPORT_SYMBOL_GPL(ar71xx_ddr_flush);