ar7: add 3.18 support

[openwrt.git] / target / linux / ar7 / patches-3.18 / 950-cpmac_titan.patch

diff --git a/target/linux/ar7/patches-3.18/950-cpmac_titan.patch b/target/linux/ar7/patches-3.18/950-cpmac_titan.patch
new file mode 100644 (file)
index 0000000..1d76e9f
--- /dev/null
+++ b/target/linux/ar7/patches-3.18/950-cpmac_titan.patch
@@ -0,0 +1,52 @@
+--- a/drivers/net/ethernet/ti/cpmac.c
++++ b/drivers/net/ethernet/ti/cpmac.c
+@@ -1154,6 +1154,8 @@ static int cpmac_probe(struct platform_d
+               goto fail;
+       }
+ 
++      ar7_device_reset(pdata->reset_bit);
++
+       dev->irq = platform_get_irq_byname(pdev, "irq");
+ 
+       dev->netdev_ops = &cpmac_netdev_ops;
+@@ -1232,7 +1234,7 @@ int cpmac_init(void)
+       cpmac_mii->reset = cpmac_mdio_reset;
+       cpmac_mii->irq = mii_irqs;
+ 
+-      cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256);
++      cpmac_mii->priv = ioremap(ar7_is_titan() ? TITAN_REGS_MDIO : AR7_REGS_MDIO, 256);
+ 
+       if (!cpmac_mii->priv) {
+               printk(KERN_ERR "Can't ioremap mdio registers\n");
+@@ -1243,10 +1245,16 @@ int cpmac_init(void)
+ #warning FIXME: unhardcode gpio&reset bits
+       ar7_gpio_disable(26);
+       ar7_gpio_disable(27);
+-      ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
+-      ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
++
++      if (!ar7_is_titan()) {
++              ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
++              ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
++      }
+       ar7_device_reset(AR7_RESET_BIT_EPHY);
+ 
++      if (ar7_is_titan())
++              ar7_device_reset(TITAN_RESET_BIT_EPHY1);
++
+       cpmac_mii->reset(cpmac_mii);
+ 
+       for (i = 0; i < 300; i++) {
+@@ -1263,7 +1271,11 @@ int cpmac_init(void)
+               mask = 0;
+       }
+ 
+-      cpmac_mii->phy_mask = ~(mask | 0x80000000);
++      if (ar7_is_titan())
++              cpmac_mii->phy_mask = ~(mask | 0x80000000 | 0x40000000);
++      else
++              cpmac_mii->phy_mask = ~(mask | 0x80000000);
++
+       snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "cpmac-1");
+ 
+       res = mdiobus_register(cpmac_mii);