target/linux/xburst/patches-3.18/003-NAND-Add-support-for-subpage-reads-for-NAND_ECC_HW_O.patch

   1 From 6031a240816d1c9a10f596d0648e586f6b878809 Mon Sep 17 00:00:00 2001
   2 From: Lars-Peter Clausen <lars@metafoo.de>
   3 Date: Tue, 15 Mar 2011 12:33:41 +0100
   4 Subject: [PATCH 3/7] NAND: Add support for subpage reads for
   5  NAND_ECC_HW_OOB_FIRST
   6
   7 ---
   8  drivers/mtd/nand/nand_base.c |   77 +++++++++++++++++++++++++++++++++++++++++-
   9  1 file changed, 76 insertions(+), 1 deletion(-)
  10
  11 diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
  12 index 4c8d646..9809059 100644
  13 --- a/drivers/mtd/nand/nand_base.c
  14 +++ b/drivers/mtd/nand/nand_base.c
  15 @@ -1393,6 +1393,75 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
  16  }
  17
  18  /**
  19 + * nand_read_subpage_hwecc_oob_first - [REPLACABLE] hw ecc based sub-page read function
  20 + * @mtd:       mtd info structure
  21 + * @chip:      nand chip info structure
  22 + * @data_offs: offset of requested data within the page
  23 + * @readlen:   data length
  24 + * @bufpoi:    buffer to store read data
  25 + * @page:      page number to read
  26 + *
  27 + * Hardware ECC for large page chips, require OOB to be read first.
  28 + * For this ECC mode, the write_page method is re-used from ECC_HW.
  29 + * These methods read/write ECC from the OOB area, unlike the
  30 + * ECC_HW_SYNDROME support with multiple ECC steps, follows the
  31 + * "infix ECC" scheme and reads/writes ECC from the data area, by
  32 + * overwriting the NAND manufacturer bad block markings.
  33 + */
  34 +static int nand_read_subpage_hwecc_oob_first(struct mtd_info *mtd, struct nand_chip *chip,
  35 +                       uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page)
  36 +{
  37 +       int start_step, end_step, num_steps;
  38 +       uint32_t *eccpos = chip->ecc.layout->eccpos;
  39 +       uint8_t *p;
  40 +       int data_col_addr;
  41 +       int eccsize = chip->ecc.size;
  42 +       int eccbytes = chip->ecc.bytes;
  43 +       uint8_t *ecc_code = chip->buffers->ecccode;
  44 +       uint8_t *ecc_calc = chip->buffers->ecccalc;
  45 +       int i;
  46 +
  47 +       /* Column address wihin the page aligned to ECC size */
  48 +       start_step = data_offs / chip->ecc.size;
  49 +       end_step = (data_offs + readlen - 1) / chip->ecc.size;
  50 +       num_steps = end_step - start_step + 1;
  51 +
  52 +       data_col_addr = start_step * chip->ecc.size;
  53 +
  54 +       /* Read the OOB area first */
  55 +       if (mtd->writesize > 512) {
  56 +               chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
  57 +               chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
  58 +               chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
  59 +       } else {
  60 +               chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
  61 +               chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
  62 +               chip->cmdfunc(mtd, NAND_CMD_READ0, data_col_addr, page);
  63 +       }
  64 +
  65 +       for (i = 0; i < chip->ecc.total; i++)
  66 +               ecc_code[i] = chip->oob_poi[eccpos[i]];
  67 +
  68 +       p = bufpoi + data_col_addr;
  69 +
  70 +       for (i = eccbytes * start_step; num_steps; num_steps--, i += eccbytes, p += eccsize) {
  71 +               int stat;
  72 +
  73 +               chip->ecc.hwctl(mtd, NAND_ECC_READ);
  74 +               chip->read_buf(mtd, p, eccsize);
  75 +               chip->ecc.calculate(mtd, p, &ecc_calc[i]);
  76 +
  77 +               stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
  78 +               if (stat < 0)
  79 +                       mtd->ecc_stats.failed++;
  80 +               else
  81 +                       mtd->ecc_stats.corrected += stat;
  82 +       }
  83 +
  84 +       return 0;
  85 +}
  86 +
  87 +/**
  88   * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
  89   * @mtd: mtd info structure
  90   * @chip: nand chip info structure
  91 @@ -3950,8 +4019,14 @@ int nand_scan_tail(struct mtd_info *mtd)
  92                         pr_warn("No ECC functions supplied; hardware ECC not possible\n");
  93                         BUG();
  94                 }
  95 -               if (!ecc->read_page)
  96 +
  97 +               if (!ecc->read_page) {
  98                         ecc->read_page = nand_read_page_hwecc_oob_first;
  99 +                       if (!ecc->read_subpage) {
 100 +                               ecc->read_subpage = nand_read_subpage_hwecc_oob_first;
 101 +                               chip->options |= NAND_SUBPAGE_READ;
 102 +                       }
 103 +               }
 104
 105         case NAND_ECC_HW:
 106                 /* Use standard hwecc read page function? */
 107 --
 108 1.7.10.4
 109