2 * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
3 * JZ4720/JZ4740 SoC ADC driver
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * You should have received a copy of the GNU General Public License along
11 * with this program; if not, write to the Free Software Foundation, Inc.,
12 * 675 Mass Ave, Cambridge, MA 02139, USA.
14 * This driver is meant to synchronize access to the adc core for the battery
15 * and touchscreen driver. Thus these drivers should use the adc driver as a
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/platform_device.h>
22 #include <linux/spinlock.h>
23 #include <linux/interrupt.h>
24 #include <linux/jz4740-adc.h>
26 #define JZ_REG_ADC_ENABLE 0x00
27 #define JZ_REG_ADC_CFG 0x04
28 #define JZ_REG_ADC_CTRL 0x08
29 #define JZ_REG_ADC_STATUS 0x0C
30 #define JZ_REG_ADC_SAME 0x10
31 #define JZ_REG_ADC_WAIT 0x14
32 #define JZ_REG_ADC_TOUCH 0x18
33 #define JZ_REG_ADC_BATTERY 0x1C
34 #define JZ_REG_ADC_ADCIN 0x20
36 #define JZ_ADC_ENABLE_TOUCH BIT(2)
37 #define JZ_ADC_ENABLE_BATTERY BIT(1)
38 #define JZ_ADC_ENABLE_ADCIN BIT(0)
40 #define JZ_ADC_CFG_SPZZ BIT(31)
41 #define JZ_ADC_CFG_EX_IN BIT(30)
42 #define JZ_ADC_CFG_DNUM_MASK (0x7 << 16)
43 #define JZ_ADC_CFG_DMA_ENABLE BIT(15)
44 #define JZ_ADC_CFG_XYZ_MASK (0x2 << 13)
45 #define JZ_ADC_CFG_SAMPLE_NUM_MASK (0x7 << 10)
46 #define JZ_ADC_CFG_CLKDIV (0xf << 5)
47 #define JZ_ADC_CFG_BAT_MB BIT(4)
49 #define JZ_ADC_CFG_DNUM_OFFSET 16
50 #define JZ_ADC_CFG_XYZ_OFFSET 13
51 #define JZ_ADC_CFG_SAMPLE_NUM_OFFSET 10
52 #define JZ_ADC_CFG_CLKDIV_OFFSET 5
54 #define JZ_ADC_IRQ_PENDOWN BIT(4)
55 #define JZ_ADC_IRQ_PENUP BIT(3)
56 #define JZ_ADC_IRQ_TOUCH BIT(2)
57 #define JZ_ADC_IRQ_BATTERY BIT(1)
58 #define JZ_ADC_IRQ_ADCIN BIT(0)
60 #define JZ_ADC_TOUCH_TYPE1 BIT(31)
61 #define JZ_ADC_TOUCH_DATA1_MASK 0xfff
62 #define JZ_ADC_TOUCH_TYPE0 BIT(15)
63 #define JZ_ADC_TOUCH_DATA0_MASK 0xfff
65 #define JZ_ADC_BATTERY_MASK 0xfff
67 #define JZ_ADC_ADCIN_MASK 0xfff
75 struct completion bat_completion;
76 struct completion adc_completion;
81 static irqreturn_t jz4740_adc_irq(int irq, void *data)
83 struct jz4740_adc *adc = data;
86 status = readb(adc->base + JZ_REG_ADC_STATUS);
88 if (status & JZ_ADC_IRQ_BATTERY)
89 complete(&adc->bat_completion);
90 if (status & JZ_ADC_IRQ_ADCIN)
91 complete(&adc->adc_completion);
93 writeb(0xff, adc->base + JZ_REG_ADC_STATUS);
98 static void jz4740_adc_enable_irq(struct jz4740_adc *adc, int irq)
103 spin_lock_irqsave(&adc->lock, flags);
105 val = readb(adc->base + JZ_REG_ADC_CTRL);
107 writeb(val, adc->base + JZ_REG_ADC_CTRL);
109 spin_unlock_irqrestore(&adc->lock, flags);
112 static void jz4740_adc_disable_irq(struct jz4740_adc *adc, int irq)
117 spin_lock_irqsave(&adc->lock, flags);
119 val = readb(adc->base + JZ_REG_ADC_CTRL);
121 writeb(val, adc->base + JZ_REG_ADC_CTRL);
123 spin_unlock_irqrestore(&adc->lock, flags);
126 static void jz4740_adc_enable_adc(struct jz4740_adc *adc, int engine)
131 spin_lock_irqsave(&adc->lock, flags);
133 val = readb(adc->base + JZ_REG_ADC_ENABLE);
135 writeb(val, adc->base + JZ_REG_ADC_ENABLE);
137 spin_unlock_irqrestore(&adc->lock, flags);
140 static void jz4740_adc_disable_adc(struct jz4740_adc *adc, int engine)
145 spin_lock_irqsave(&adc->lock, flags);
147 val = readb(adc->base + JZ_REG_ADC_ENABLE);
149 writeb(val, adc->base + JZ_REG_ADC_ENABLE);
151 spin_unlock_irqrestore(&adc->lock, flags);
154 static inline void jz4740_adc_set_cfg(struct jz4740_adc *adc, uint32_t mask,
160 spin_lock_irqsave(&adc->lock, flags);
162 cfg = readl(adc->base + JZ_REG_ADC_CFG);
167 writel(cfg, adc->base + JZ_REG_ADC_CFG);
169 spin_unlock_irqrestore(&adc->lock, flags);
172 long jz4740_adc_read_battery_voltage(struct device *dev,
173 enum jz_adc_battery_scale scale)
175 struct jz4740_adc *adc = dev_get_drvdata(dev);
183 if (scale == JZ_ADC_BATTERY_SCALE_2V5)
184 jz4740_adc_set_cfg(adc, JZ_ADC_CFG_BAT_MB, JZ_ADC_CFG_BAT_MB);
186 jz4740_adc_set_cfg(adc, JZ_ADC_CFG_BAT_MB, 0);
188 jz4740_adc_enable_irq(adc, JZ_ADC_IRQ_BATTERY);
189 jz4740_adc_enable_adc(adc, JZ_ADC_ENABLE_BATTERY);
191 t = wait_for_completion_interruptible_timeout(&adc->bat_completion,
194 jz4740_adc_disable_irq(adc, JZ_ADC_IRQ_BATTERY);
197 jz4740_adc_disable_adc(adc, JZ_ADC_ENABLE_BATTERY);
198 return t ? t : -ETIMEDOUT;
201 val = readw(adc->base + JZ_REG_ADC_BATTERY);
203 if (scale == JZ_ADC_BATTERY_SCALE_2V5)
204 voltage = (((long long)val) * 2500000LL) >> 12LL;
206 voltage = ((((long long)val) * 7395000LL) >> 12LL) + 33000LL;
210 EXPORT_SYMBOL_GPL(jz4740_adc_read_battery_voltage);
212 static ssize_t jz4740_adc_read_adcin(struct device *dev,
213 struct device_attribute *dev_attr,
216 struct jz4740_adc *adc = dev_get_drvdata(dev);
220 jz4740_adc_enable_irq(adc, JZ_ADC_IRQ_ADCIN);
221 jz4740_adc_enable_adc(adc, JZ_ADC_ENABLE_ADCIN);
223 t = wait_for_completion_interruptible_timeout(&adc->adc_completion,
226 jz4740_adc_disable_irq(adc, JZ_ADC_IRQ_ADCIN);
229 jz4740_adc_disable_adc(adc, JZ_ADC_ENABLE_ADCIN);
230 return t ? t : -ETIMEDOUT;
233 val = readw(adc->base + JZ_REG_ADC_ADCIN);
235 return sprintf(buf, "%d\n", val);
238 static DEVICE_ATTR(adcin, S_IRUGO, jz4740_adc_read_adcin, NULL);
240 static int __devinit jz4740_adc_probe(struct platform_device *pdev)
243 struct jz4740_adc *adc;
245 adc = kmalloc(sizeof(*adc), GFP_KERNEL);
247 adc->irq = platform_get_irq(pdev, 0);
251 dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret);
255 adc->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
259 dev_err(&pdev->dev, "Failed to get platform mmio resource\n");
263 adc->mem = request_mem_region(adc->mem->start, resource_size(adc->mem),
268 dev_err(&pdev->dev, "Failed to request mmio memory region\n");
272 adc->base = ioremap_nocache(adc->mem->start, resource_size(adc->mem));
276 dev_err(&pdev->dev, "Failed to ioremap mmio memory\n");
277 goto err_release_mem_region;
281 init_completion(&adc->bat_completion);
282 init_completion(&adc->adc_completion);
284 spin_lock_init(&adc->lock);
286 platform_set_drvdata(pdev, adc);
288 ret = request_irq(adc->irq, jz4740_adc_irq, 0, pdev->name, adc);
291 dev_err(&pdev->dev, "Failed to request irq: %d\n", ret);
295 ret = device_create_file(&pdev->dev, &dev_attr_adcin);
297 dev_err(&pdev->dev, "Failed to create sysfs file: %d\n", ret);
301 writeb(0x00, adc->base + JZ_REG_ADC_ENABLE);
302 writeb(0xff, adc->base + JZ_REG_ADC_CTRL);
307 free_irq(adc->irq, adc);
309 platform_set_drvdata(pdev, NULL);
311 err_release_mem_region:
312 release_mem_region(adc->mem->start, resource_size(adc->mem));
319 static int __devexit jz4740_adc_remove(struct platform_device *pdev)
321 struct jz4740_adc *adc = platform_get_drvdata(pdev);
323 device_remove_file(&pdev->dev, &dev_attr_adcin);
325 free_irq(adc->irq, adc);
328 release_mem_region(adc->mem->start, resource_size(adc->mem));
330 platform_set_drvdata(pdev, NULL);
337 struct platform_driver jz4740_adc_driver = {
338 .probe = jz4740_adc_probe,
339 .remove = jz4740_adc_remove,
341 .name = "jz4740-adc",
342 .owner = THIS_MODULE,
346 static int __init jz4740_adc_init(void)
348 return platform_driver_register(&jz4740_adc_driver);
350 module_init(jz4740_adc_init);
352 static void __exit jz4740_adc_exit(void)
354 platform_driver_unregister(&jz4740_adc_driver);
356 module_exit(jz4740_adc_exit);
358 MODULE_DESCRIPTION("JZ4720/JZ4740 SoC ADC driver");
359 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
360 MODULE_LICENSE("GPL");
361 MODULE_ALIAS("platform:jz4740-adc");
362 MODULE_ALIAS("platform:jz4720-adc");