target/linux/sunxi/patches-4.4/107-clk-sunxi-add-h3-usbphy-clocks.patch

   1 From 7bec0200ac214b5cba44e2c2c4385815be4b9f00 Mon Sep 17 00:00:00 2001
   2 From: Reinder de Haan <patchesrdh@mveas.com>
   3 Date: Sun, 15 Nov 2015 20:46:13 +0100
   4 Subject: [PATCH] clk: sunxi: Add support for the H3 usb phy clocks
   5
   6 The H3 has a usb-phy clk register which is similar to that of earlier
   7 SoCs, but with support for a larger number of phys. So we can simply add
   8 a new set of clk-data and a new compatible and be done with it.
   9
  10 Acked-by: Chen-Yu Tsai <wens@csie.org>
  11 Acked-by: Rob Herring <robh@kernel.org>
  12 Signed-off-by: Reinder de Haan <patchesrdh@mveas.com>
  13 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
  14 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  15 ---
  16  Documentation/devicetree/bindings/clock/sunxi.txt |  1 +
  17  drivers/clk/sunxi/clk-usb.c                       | 12 ++++++++++++
  18  2 files changed, 13 insertions(+)
  19
  20 diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
  21 index 8a47b77..a94bb56 100644
  22 --- a/Documentation/devicetree/bindings/clock/sunxi.txt
  23 +++ b/Documentation/devicetree/bindings/clock/sunxi.txt
  24 @@ -68,6 +68,7 @@ Required properties:
  25         "allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
  26         "allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31
  27         "allwinner,sun8i-a23-usb-clk" - for usb gates + resets on A23
  28 +       "allwinner,sun8i-h3-usb-clk" - for usb gates + resets on H3
  29         "allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
  30         "allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80
  31
  32 diff --git a/drivers/clk/sunxi/clk-usb.c b/drivers/clk/sunxi/clk-usb.c
  33 index 1a72cd6..67b8e38 100644
  34 --- a/drivers/clk/sunxi/clk-usb.c
  35 +++ b/drivers/clk/sunxi/clk-usb.c
  36 @@ -243,3 +243,15 @@ static void __init sun9i_a80_usb_phy_setup(struct device_node *node)
  37         sunxi_usb_clk_setup(node, &sun9i_a80_usb_phy_data, &a80_usb_phy_lock);
  38  }
  39  CLK_OF_DECLARE(sun9i_a80_usb_phy, "allwinner,sun9i-a80-usb-phy-clk", sun9i_a80_usb_phy_setup);
  40 +
  41 +static const struct usb_clk_data sun8i_h3_usb_clk_data __initconst = {
  42 +       .clk_mask =  BIT(19) | BIT(18) | BIT(17) | BIT(16) |
  43 +                    BIT(11) | BIT(10) | BIT(9) | BIT(8),
  44 +       .reset_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
  45 +};
  46 +
  47 +static void __init sun8i_h3_usb_setup(struct device_node *node)
  48 +{
  49 +       sunxi_usb_clk_setup(node, &sun8i_h3_usb_clk_data, &sun4i_a10_usb_lock);
  50 +}
  51 +CLK_OF_DECLARE(sun8i_h3_usb, "allwinner,sun8i-h3-usb-clk", sun8i_h3_usb_setup);