3c567f82a4b7ac02cfa3413630742a54b9d77c7b
[15.05/openwrt.git] / target / linux / sunxi / patches-3.14 / 192-ahci-platform-changes.patch
1 From a52ae09871d171d6771b4bef2d4c56dd435e740f Mon Sep 17 00:00:00 2001
2 From: Roger Quadros <rogerq@ti.com>
3 Date: Mon, 20 Jan 2014 16:32:33 +0200
4 Subject: [PATCH] ata: ahci_platform: Add DT compatible for Synopsis DWC AHCI
5  controller
6
7 Add compatible string "snps,dwc-ahci", which should be used
8 for Synopsis Designware SATA cores. e.g. on TI OMAP5 and DRA7 platforms.
9
10 Signed-off-by: Roger Quadros <rogerq@ti.com>
11 Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
12 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
13 ---
14  drivers/ata/ahci_platform.c | 1 +
15  1 file changed, 1 insertion(+)
16
17 diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
18 index bdadec1..d7e55ba 100644
19 --- a/drivers/ata/ahci_platform.c
20 +++ b/drivers/ata/ahci_platform.c
21 @@ -609,6 +609,7 @@ static const struct of_device_id ahci_of_match[] = {
22         { .compatible = "snps,spear-ahci", },
23         { .compatible = "snps,exynos5440-ahci", },
24         { .compatible = "ibm,476gtr-ahci", },
25 +       { .compatible = "snps,dwc-ahci", },
26         {},
27  };
28  MODULE_DEVICE_TABLE(of, ahci_of_match);
29 -- 
30 2.0.3
31
32 From 2be39fa6b6531bd083c766999345adc348b14c77 Mon Sep 17 00:00:00 2001
33 From: Roger Quadros <rogerq@ti.com>
34 Date: Mon, 27 Jan 2014 16:41:18 +0200
35 Subject: [PATCH] ata: ahci_platform: Manage SATA PHY
36
37 Some platforms have a PHY hooked up to the
38 SATA controller. The PHY needs to be initialized
39 and powered up for SATA to work. We do that
40 using the PHY framework.
41
42 CC: Balaji T K <balajitk@ti.com>
43 Signed-off-by: Roger Quadros <rogerq@ti.com>
44 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
45 ---
46  drivers/ata/ahci.h          |  2 ++
47  drivers/ata/ahci_platform.c | 47 +++++++++++++++++++++++++++++++++++++++++++--
48  2 files changed, 47 insertions(+), 2 deletions(-)
49
50 diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
51 index bf8100c..3ab7ac9 100644
52 --- a/drivers/ata/ahci.h
53 +++ b/drivers/ata/ahci.h
54 @@ -37,6 +37,7 @@
55  
56  #include <linux/clk.h>
57  #include <linux/libata.h>
58 +#include <linux/phy/phy.h>
59  #include <linux/regulator/consumer.h>
60  
61  /* Enclosure Management Control */
62 @@ -325,6 +326,7 @@ struct ahci_host_priv {
63         u32                     em_msg_type;    /* EM message type */
64         struct clk              *clks[AHCI_MAX_CLKS]; /* Optional */
65         struct regulator        *target_pwr;    /* Optional */
66 +       struct phy              *phy;           /* If platform uses phy */
67         void                    *plat_data;     /* Other platform data */
68         /*
69          * Optional ahci_start_engine override, if not set this gets set to the
70 diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
71 index d7e55ba..99d38c1 100644
72 --- a/drivers/ata/ahci_platform.c
73 +++ b/drivers/ata/ahci_platform.c
74 @@ -23,6 +23,7 @@
75  #include <linux/platform_device.h>
76  #include <linux/libata.h>
77  #include <linux/ahci_platform.h>
78 +#include <linux/phy/phy.h>
79  #include "ahci.h"
80  
81  static void ahci_host_stop(struct ata_host *host);
82 @@ -147,6 +148,7 @@ EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
83   *     the following order:
84   *     1) Regulator
85   *     2) Clocks (through ahci_platform_enable_clks)
86 + *     3) Phy
87   *
88   *     If resource enabling fails at any point the previous enabled
89   *     resources are disabled in reverse order.
90 @@ -171,8 +173,23 @@ int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
91         if (rc)
92                 goto disable_regulator;
93  
94 +       if (hpriv->phy) {
95 +               rc = phy_init(hpriv->phy);
96 +               if (rc)
97 +                       goto disable_clks;
98 +
99 +               rc = phy_power_on(hpriv->phy);
100 +               if (rc) {
101 +                       phy_exit(hpriv->phy);
102 +                       goto disable_clks;
103 +               }
104 +       }
105 +
106         return 0;
107  
108 +disable_clks:
109 +       ahci_platform_disable_clks(hpriv);
110 +
111  disable_regulator:
112         if (hpriv->target_pwr)
113                 regulator_disable(hpriv->target_pwr);
114 @@ -186,14 +203,20 @@ EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
115   *
116   *     This function disables all ahci_platform managed resources in
117   *     the following order:
118 - *     1) Clocks (through ahci_platform_disable_clks)
119 - *     2) Regulator
120 + *     1) Phy
121 + *     2) Clocks (through ahci_platform_disable_clks)
122 + *     3) Regulator
123   *
124   *     LOCKING:
125   *     None.
126   */
127  void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
128  {
129 +       if (hpriv->phy) {
130 +               phy_power_off(hpriv->phy);
131 +               phy_exit(hpriv->phy);
132 +       }
133 +
134         ahci_platform_disable_clks(hpriv);
135  
136         if (hpriv->target_pwr)
137 @@ -222,6 +245,7 @@ static void ahci_platform_put_resources(struct device *dev, void *res)
138   *     2) regulator for controlling the targets power (optional)
139   *     3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
140   *        or for non devicetree enabled platforms a single clock
141 + *     4) phy (optional)
142   *
143   *     LOCKING:
144   *     None.
145 @@ -283,6 +307,25 @@ struct ahci_host_priv *ahci_platform_get_resources(
146                 hpriv->clks[i] = clk;
147         }
148  
149 +       hpriv->phy = devm_phy_get(dev, "sata-phy");
150 +       if (IS_ERR(hpriv->phy)) {
151 +               rc = PTR_ERR(hpriv->phy);
152 +               switch (rc) {
153 +               case -ENODEV:
154 +               case -ENOSYS:
155 +                       /* continue normally */
156 +                       hpriv->phy = NULL;
157 +                       break;
158 +
159 +               case -EPROBE_DEFER:
160 +                       goto err_out;
161 +
162 +               default:
163 +                       dev_err(dev, "couldn't get sata-phy\n");
164 +                       goto err_out;
165 +               }
166 +       }
167 +
168         devres_remove_group(dev, NULL);
169         return hpriv;
170  
171 -- 
172 2.0.3
173
174 From 22d93de35a39507bcdf0c62c5e1fab0625f7c6f6 Mon Sep 17 00:00:00 2001
175 From: Roger Quadros <rogerq@ti.com>
176 Date: Wed, 9 Oct 2013 15:08:59 +0300
177 Subject: [PATCH] ata: ahci_platform: runtime resume the device before use
178
179 On OMAP platforms the device needs to be runtime resumed before
180 it can be accessed. The OMAP HWMOD framework takes care of
181 enabling the module and its resources based on the
182 device's runtime PM state.
183
184 In this patch we runtime resume during .probe() and runtime suspend
185 after .remove().
186
187 We also update the runtime PM state during .resume().
188
189 CC: Balaji T K <balajitk@ti.com>
190 Signed-off-by: Roger Quadros <rogerq@ti.com>
191 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
192 ---
193  drivers/ata/ahci.h          |  1 +
194  drivers/ata/ahci_platform.c | 15 +++++++++++++++
195  2 files changed, 16 insertions(+)
196
197 diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
198 index 3ab7ac9..51af275b 100644
199 --- a/drivers/ata/ahci.h
200 +++ b/drivers/ata/ahci.h
201 @@ -324,6 +324,7 @@ struct ahci_host_priv {
202         u32                     em_loc; /* enclosure management location */
203         u32                     em_buf_sz;      /* EM buffer size in byte */
204         u32                     em_msg_type;    /* EM message type */
205 +       bool                    got_runtime_pm; /* Did we do pm_runtime_get? */
206         struct clk              *clks[AHCI_MAX_CLKS]; /* Optional */
207         struct regulator        *target_pwr;    /* Optional */
208         struct phy              *phy;           /* If platform uses phy */
209 diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
210 index 99d38c1..75698a4 100644
211 --- a/drivers/ata/ahci_platform.c
212 +++ b/drivers/ata/ahci_platform.c
213 @@ -24,6 +24,7 @@
214  #include <linux/libata.h>
215  #include <linux/ahci_platform.h>
216  #include <linux/phy/phy.h>
217 +#include <linux/pm_runtime.h>
218  #include "ahci.h"
219  
220  static void ahci_host_stop(struct ata_host *host);
221 @@ -229,6 +230,11 @@ static void ahci_platform_put_resources(struct device *dev, void *res)
222         struct ahci_host_priv *hpriv = res;
223         int c;
224  
225 +       if (hpriv->got_runtime_pm) {
226 +               pm_runtime_put_sync(dev);
227 +               pm_runtime_disable(dev);
228 +       }
229 +
230         for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
231                 clk_put(hpriv->clks[c]);
232  }
233 @@ -326,6 +332,10 @@ struct ahci_host_priv *ahci_platform_get_resources(
234                 }
235         }
236  
237 +       pm_runtime_enable(dev);
238 +       pm_runtime_get_sync(dev);
239 +       hpriv->got_runtime_pm = true;
240 +
241         devres_remove_group(dev, NULL);
242         return hpriv;
243  
244 @@ -635,6 +645,11 @@ int ahci_platform_resume(struct device *dev)
245         if (rc)
246                 goto disable_resources;
247  
248 +       /* We resumed so update PM runtime state */
249 +       pm_runtime_disable(dev);
250 +       pm_runtime_set_active(dev);
251 +       pm_runtime_enable(dev);
252 +
253         return 0;
254  
255  disable_resources:
256 -- 
257 2.0.3
258
259 From 22cccaf7a29b2a9d8a1440d089f399a6d2432b81 Mon Sep 17 00:00:00 2001
260 From: Hans de Goede <hdegoede@redhat.com>
261 Date: Sun, 23 Feb 2014 11:37:17 +0100
262 Subject: [PATCH] ahci_sunxi: Use msleep instead of mdelay
263
264 ahci_sunxi_phy_init is called from the probe and resume code paths, and
265 sleeping is safe in both, so use msleep instead of mdelay.
266
267 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
268 ---
269  drivers/ata/ahci_sunxi.c | 6 +++---
270  1 file changed, 3 insertions(+), 3 deletions(-)
271
272 diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
273 index 001f7dfc..d1bf3f7 100644
274 --- a/drivers/ata/ahci_sunxi.c
275 +++ b/drivers/ata/ahci_sunxi.c
276 @@ -90,7 +90,7 @@ static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base)
277  
278         /* This magic is from the original code */
279         writel(0, reg_base + AHCI_RWCR);
280 -       mdelay(5);
281 +       msleep(5);
282  
283         sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(19));
284         sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
285 @@ -105,7 +105,7 @@ static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base)
286                          (0x7 << 20), (0x3 << 20));
287         sunxi_clrsetbits(reg_base + AHCI_PHYCS2R,
288                          (0x1f << 5), (0x19 << 5));
289 -       mdelay(5);
290 +       msleep(5);
291  
292         sunxi_setbits(reg_base + AHCI_PHYCS0R, (0x1 << 19));
293  
294 @@ -137,7 +137,7 @@ static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base)
295                 udelay(1);
296         } while (1);
297  
298 -       mdelay(15);
299 +       msleep(15);
300  
301         writel(0x7, reg_base + AHCI_RWCR);
302  
303 -- 
304 2.0.3
305