1 From 0643a93746775da2189ab0afd8f748afcaa791c5 Mon Sep 17 00:00:00 2001
2 From: Hans de Goede <hdegoede@redhat.com>
3 Date: Fri, 7 Feb 2014 16:21:49 +0100
4 Subject: [PATCH] clk: sunxi: Add support for USB clock-register reset bits
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 The usb-clk register is special in that it not only contains clk gate bits,
10 but also has a few reset bits. This commit adds support for this by allowing
11 gates type sunxi clks to also register a reset controller.
13 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
14 Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
15 Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
16 Signed-off-by: Emilio López <emilio@elopez.com.ar>
18 drivers/clk/sunxi/clk-sunxi.c | 71 +++++++++++++++++++++++++++++++++++++++++++
19 1 file changed, 71 insertions(+)
21 --- a/drivers/clk/sunxi/clk-sunxi.c
22 +++ b/drivers/clk/sunxi/clk-sunxi.c
24 #include <linux/clkdev.h>
26 #include <linux/of_address.h>
27 +#include <linux/reset-controller.h>
29 #include "clk-factors.h"
31 @@ -688,6 +689,59 @@ static void __init sunxi_divider_clk_set
35 + * sunxi_gates_reset... - reset bits in leaf gate clk registers handling
38 +struct gates_reset_data {
41 + struct reset_controller_dev rcdev;
44 +static int sunxi_gates_reset_assert(struct reset_controller_dev *rcdev,
47 + struct gates_reset_data *data = container_of(rcdev,
48 + struct gates_reset_data,
50 + unsigned long flags;
53 + spin_lock_irqsave(data->lock, flags);
55 + reg = readl(data->reg);
56 + writel(reg & ~BIT(id), data->reg);
58 + spin_unlock_irqrestore(data->lock, flags);
63 +static int sunxi_gates_reset_deassert(struct reset_controller_dev *rcdev,
66 + struct gates_reset_data *data = container_of(rcdev,
67 + struct gates_reset_data,
69 + unsigned long flags;
72 + spin_lock_irqsave(data->lock, flags);
74 + reg = readl(data->reg);
75 + writel(reg | BIT(id), data->reg);
77 + spin_unlock_irqrestore(data->lock, flags);
82 +static struct reset_control_ops sunxi_gates_reset_ops = {
83 + .assert = sunxi_gates_reset_assert,
84 + .deassert = sunxi_gates_reset_deassert,
88 * sunxi_gates_clk_setup() - Setup function for leaf gates on clocks
91 @@ -695,6 +749,7 @@ static void __init sunxi_divider_clk_set
94 DECLARE_BITMAP(mask, SUNXI_GATES_MAX_SIZE);
98 static const struct gates_data sun4i_axi_gates_data __initconst = {
99 @@ -765,6 +820,7 @@ static void __init sunxi_gates_clk_setup
100 struct gates_data *data)
102 struct clk_onecell_data *clk_data;
103 + struct gates_reset_data *reset_data;
104 const char *clk_parent;
105 const char *clk_name;
107 @@ -808,6 +864,21 @@ static void __init sunxi_gates_clk_setup
108 clk_data->clk_num = i;
110 of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
112 + /* Register a reset controler for gates with reset bits */
113 + if (data->reset_mask == 0)
116 + reset_data = kzalloc(sizeof(*reset_data), GFP_KERNEL);
120 + reset_data->reg = reg;
121 + reset_data->lock = &clk_lock;
122 + reset_data->rcdev.nr_resets = __fls(data->reset_mask) + 1;
123 + reset_data->rcdev.ops = &sunxi_gates_reset_ops;
124 + reset_data->rcdev.of_node = node;
125 + reset_controller_register(&reset_data->rcdev);