1 From cac3c4d67c80c4895d0d44e609beb535d66af6a3 Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime.ripard@free-electrons.com>
3 Date: Sat, 22 Feb 2014 22:35:55 +0100
4 Subject: [PATCH] ARM: dt: sun4i: Add A10 SPI controller nodes
6 The A10 has 4 SPI controllers that are now supported. Add them in the DT.
8 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
10 arch/arm/boot/dts/sun4i-a10.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++
11 1 file changed, 44 insertions(+)
13 --- a/arch/arm/boot/dts/sun4i-a10.dtsi
14 +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
19 + spi0: spi@01c05000 {
20 + compatible = "allwinner,sun4i-a10-spi";
21 + reg = <0x01c05000 0x1000>;
23 + clocks = <&ahb_gates 20>, <&spi0_clk>;
24 + clock-names = "ahb", "mod";
25 + status = "disabled";
26 + #address-cells = <1>;
30 + spi1: spi@01c06000 {
31 + compatible = "allwinner,sun4i-a10-spi";
32 + reg = <0x01c06000 0x1000>;
34 + clocks = <&ahb_gates 21>, <&spi1_clk>;
35 + clock-names = "ahb", "mod";
36 + status = "disabled";
37 + #address-cells = <1>;
41 emac: ethernet@01c0b000 {
42 compatible = "allwinner,sun4i-a10-emac";
43 reg = <0x01c0b000 0x1000>;
48 + spi2: spi@01c17000 {
49 + compatible = "allwinner,sun4i-a10-spi";
50 + reg = <0x01c17000 0x1000>;
52 + clocks = <&ahb_gates 22>, <&spi2_clk>;
53 + clock-names = "ahb", "mod";
54 + status = "disabled";
55 + #address-cells = <1>;
59 + spi3: spi@01c1f000 {
60 + compatible = "allwinner,sun4i-a10-spi";
61 + reg = <0x01c1f000 0x1000>;
63 + clocks = <&ahb_gates 23>, <&spi3_clk>;
64 + clock-names = "ahb", "mod";
65 + status = "disabled";
66 + #address-cells = <1>;
70 intc: interrupt-controller@01c20400 {
71 compatible = "allwinner,sun4i-ic";
72 reg = <0x01c20400 0x400>;