1 From 3c6560eccfeee3a93d57c3b2206abfbe06459015 Mon Sep 17 00:00:00 2001
2 From: Chen-Yu Tsai <wens@csie.org>
3 Date: Sat, 7 Dec 2013 01:29:37 +0800
4 Subject: [PATCH] net: stmmac: sunxi platfrom extensions for GMAC in Allwinner
7 The Allwinner A20 has an ethernet controller that seems to be
8 an early version of Synopsys DesignWare MAC 10/100/1000 Universal,
9 which is supported by the stmmac driver.
11 Allwinner's GMAC requires setting additional registers in the SoC's
14 The exact version of the DWMAC IP that Allwinner uses is unknown,
15 thus the exact feature set is unknown.
17 Signed-off-by: Chen-Yu Tsai <wens@csie.org>
19 .../bindings/net/allwinner,sun7i-gmac.txt | 22 +++++++
20 drivers/net/ethernet/stmicro/stmmac/Kconfig | 12 ++++
21 drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
22 drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c | 76 ++++++++++++++++++++++
23 drivers/net/ethernet/stmicro/stmmac/stmmac.h | 3 +
24 .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 +
25 6 files changed, 117 insertions(+)
26 create mode 100644 Documentation/devicetree/bindings/net/allwinner,sun7i-gmac.txt
27 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
30 +++ b/Documentation/devicetree/bindings/net/allwinner,sun7i-gmac.txt
32 +* Allwinner GMAC ethernet controller
34 +This device is a platform glue layer for stmmac.
35 +Please see stmmac.txt for the other unchanged properties.
38 + - compatible: Should be "allwinner,sun7i-gmac"
39 + - reg: Address and length of register set for the device and corresponding
44 + gmac: ethernet@01c50000 {
45 + compatible = "allwinner,sun7i-gmac";
46 + reg = <0x01c50000 0x10000>,
48 + interrupts = <0 85 1>;
49 + interrupt-names = "macirq";
50 + clocks = <&ahb_gates 49>;
51 + clock-names = "stmmaceth";
54 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
55 +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
56 @@ -25,6 +25,18 @@ config STMMAC_PLATFORM
61 + bool "Allwinner GMAC support"
62 + depends on STMMAC_PLATFORM
63 + depends on ARCH_SUNXI
66 + Support for Allwinner A20 GMAC ethernet driver.
68 + This selects Allwinner SoC glue layer support for the
69 + stmmac device driver. This driver is used for A20 GMAC
70 + ethernet controller.
73 bool "STMMAC PCI bus support"
74 depends on STMMAC_ETH && PCI
75 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
76 +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
78 obj-$(CONFIG_STMMAC_ETH) += stmmac.o
79 stmmac-$(CONFIG_STMMAC_PLATFORM) += stmmac_platform.o
80 stmmac-$(CONFIG_STMMAC_PCI) += stmmac_pci.o
81 +stmmac-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o
82 stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o \
83 chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o \
84 dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o \
86 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
89 + * dwmac-sunxi.c - Allwinner sunxi DWMAC specific glue layer
91 + * Copyright (C) 2013 Chen-Yu Tsai
93 + * Chen-Yu Tsai <wens@csie.org>
95 + * This program is free software; you can redistribute it and/or modify
96 + * it under the terms of the GNU General Public License as published by
97 + * the Free Software Foundation; either version 2 of the License, or
98 + * (at your option) any later version.
100 + * This program is distributed in the hope that it will be useful,
101 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
102 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
103 + * GNU General Public License for more details.
106 +#include <linux/clk.h>
107 +#include <linux/phy.h>
108 +#include <linux/stmmac.h>
110 +#define GMAC_IF_TYPE_RGMII 0x4
112 +#define GMAC_TX_CLK_MASK 0x3
113 +#define GMAC_TX_CLK_MII 0x0
114 +#define GMAC_TX_CLK_RGMII_INT 0x2
116 +static int sun7i_gmac_init(struct platform_device *pdev)
118 + struct resource *res;
119 + struct device *dev = &pdev->dev;
120 + void __iomem *addr = NULL;
121 + struct plat_stmmacenet_data *plat_dat = NULL;
124 + plat_dat = dev_get_platdata(&pdev->dev);
128 + /* Get GMAC clock register in CCU */
129 + res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
130 + addr = devm_ioremap_resource(dev, res);
132 + return PTR_ERR(addr);
134 + priv_clk_reg = readl(addr);
136 + /* Set GMAC interface port mode */
137 + if (plat_dat->interface == PHY_INTERFACE_MODE_RGMII)
138 + priv_clk_reg |= GMAC_IF_TYPE_RGMII;
140 + priv_clk_reg &= ~GMAC_IF_TYPE_RGMII;
142 + /* Set GMAC transmit clock source. */
143 + priv_clk_reg &= ~GMAC_TX_CLK_MASK;
144 + if (plat_dat->interface == PHY_INTERFACE_MODE_RGMII
145 + || plat_dat->interface == PHY_INTERFACE_MODE_GMII)
146 + priv_clk_reg |= GMAC_TX_CLK_RGMII_INT;
148 + priv_clk_reg |= GMAC_TX_CLK_MII;
150 + writel(priv_clk_reg, addr);
152 + /* mask out phy addr 0x0 */
153 + plat_dat->mdio_bus_data->phy_mask = 0x1;
158 +const struct plat_stmmacenet_data sun7i_gmac_data = {
161 + .init = sun7i_gmac_init,
164 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
165 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
166 @@ -130,6 +130,9 @@ void stmmac_disable_eee_mode(struct stmm
167 bool stmmac_eee_init(struct stmmac_priv *priv);
169 #ifdef CONFIG_STMMAC_PLATFORM
170 +#ifdef CONFIG_DWMAC_SUNXI
171 +extern const struct plat_stmmacenet_data sun7i_gmac_data;
173 extern struct platform_driver stmmac_pltfr_driver;
174 static inline int stmmac_register_platform(void)
176 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
177 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
178 @@ -35,6 +35,9 @@ static const struct of_device_id stmmac_
179 { .compatible = "snps,dwmac-3.70a"},
180 { .compatible = "snps,dwmac-3.710"},
181 { .compatible = "snps,dwmac"},
182 +#ifdef CONFIG_DWMAC_SUNXI
183 + { .compatible = "allwinner,sun7i-gmac", .data = &sun7i_gmac_data},
187 MODULE_DEVICE_TABLE(of, stmmac_dt_ids);