1 From 0aff0370cbffeadc14456556b904c80e30b3717e Mon Sep 17 00:00:00 2001
2 From: Chen-Yu Tsai <wens@csie.org>
3 Date: Wed, 1 Jan 2014 10:30:48 +0800
4 Subject: [PATCH] ARM: dts: sun7i: external clock outputs
6 This commit adds the two external clock outputs available on A20 to
7 its device tree. A dummy fixed factor clock is also added to serve as
8 the first input of the clock outputs, which according to AW's A20 user
9 manual, is the 24MHz oscillator divided by 750.
11 Signed-off-by: Chen-Yu Tsai <wens@csie.org>
12 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
14 arch/arm/boot/dts/sun7i-a20.dtsi | 28 ++++++++++++++++++++++++++++
15 1 file changed, 28 insertions(+)
17 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
18 index edad6f1..0d54998 100644
19 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
20 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
22 clocks = <&osc24M>, <&pll6 2>, <&pll5 1>;
23 clock-output-names = "mbus";
27 + * Dummy clock used by output clocks
31 + compatible = "fixed-factor-clock";
35 + clock-output-names = "osc24M_32k";
38 + clk_out_a: clk@01c201f0 {
40 + compatible = "allwinner,sun7i-a20-out-clk";
41 + reg = <0x01c201f0 0x4>;
42 + clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
43 + clock-output-names = "clk_out_a";
46 + clk_out_b: clk@01c201f4 {
48 + compatible = "allwinner,sun7i-a20-out-clk";
49 + reg = <0x01c201f4 0x4>;
50 + clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
51 + clock-output-names = "clk_out_b";