1 From 7df19a0adca7806e081479eecb07365652c26ef5 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
3 Date: Fri, 20 Sep 2013 22:03:12 -0300
4 Subject: [PATCH] clk: sunxi: protect core clocks from accidental shutdown
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 Some important clocks may get disabled as a side effect of another clock
10 being disabled, because they have no consumers. This patch implements a
11 mechanism so those clocks can be claimed by the driver and therefore
12 remain enabled at all times.
14 Signed-off-by: Emilio López <emilio@elopez.com.ar>
15 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
18 drivers/clk/sunxi/clk-sunxi.c
20 drivers/clk/sunxi/clk-sunxi.c | 28 ++++++++++++++++++++++++++++
21 1 file changed, 28 insertions(+)
23 --- a/drivers/clk/sunxi/clk-sunxi.c
24 +++ b/drivers/clk/sunxi/clk-sunxi.c
25 @@ -616,6 +616,31 @@ static void __init of_sunxi_table_clock_
30 + * System clock protection
32 + * By enabling these critical clocks, we prevent their accidental gating
35 +static void __init sunxi_clock_protect(void)
39 + /* memory bus clock - sun5i+ */
40 + clk = clk_get(NULL, "mbus");
42 + clk_prepare_enable(clk);
46 + /* DDR clock - sun4i+ */
47 + clk = clk_get(NULL, "pll5_ddr");
49 + clk_prepare_enable(clk);
54 static void __init sunxi_init_clocks(struct device_node *np)
56 /* Register factor clocks */
57 @@ -629,6 +654,9 @@ static void __init sunxi_init_clocks(str
59 /* Register gate clocks */
60 of_sunxi_table_clock_setup(clk_gates_match, sunxi_gates_clk_setup);
62 + /* Enable core system clocks */
63 + sunxi_clock_protect();
65 CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sunxi_init_clocks);
66 CLK_OF_DECLARE(sun5i_a10s_clk_init, "allwinner,sun5i-a10s", sunxi_init_clocks);