target/linux/ramips/patches-4.3/0060-mt7621-set-up-palmbus-memory-region.patch

   1 --- a/arch/mips/include/asm/mach-ralink/mt7621.h
   2 +++ b/arch/mips/include/asm/mach-ralink/mt7621.h
   3 @@ -13,6 +13,9 @@
   4  #ifndef _MT7621_REGS_H_
   5  #define _MT7621_REGS_H_
   6
   7 +#define MT7621_PALMBUS_BASE            0x1C000000
   8 +#define MT7621_PALMBUS_SIZE            0x03FFFFFF
   9 +
  10  #define MT7621_SYSC_BASE               0x1E000000
  11
  12  #define SYSC_REG_CHIP_NAME0            0x00
  13 --- a/arch/mips/ralink/mt7621.c
  14 +++ b/arch/mips/ralink/mt7621.c
  15 @@ -204,6 +204,21 @@ void prom_soc_init(struct ralink_soc_inf
  16         mips_cm_probe();
  17         mips_cpc_probe();
  18
  19 +       if (mips_cm_numiocu()) {
  20 +               /* mips_cm_probe() wipes out bootloader
  21 +                  config for CM regions and we have to configure them
  22 +                  again. This SoC cannot talk to pamlbus devices
  23 +                  witout proper iocu region set up.
  24 +
  25 +                  FIXME: it would be better to do this with values
  26 +                  from DT, but we need this very early because
  27 +                  without this we cannot talk to pretty much anything
  28 +                  including serial.
  29 +               */
  30 +               write_gcr_reg0_base(MT7621_PALMBUS_BASE);
  31 +               write_gcr_reg0_mask(~MT7621_PALMBUS_SIZE | CM_GCR_REGn_MASK_CMTGT_IOCU0);
  32 +       }
  33 +
  34         if (!register_cps_smp_ops())
  35                 return;
  36         if (!register_cmp_smp_ops())