target/linux/ramips/patches-4.3/0052-pwm-add-mediatek-support.patch

   1 From fc8f96309c21c1bc3276427309cd7d361347d66e Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Mon, 7 Dec 2015 17:16:50 +0100
   4 Subject: [PATCH 52/53] pwm: add mediatek support
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  drivers/pwm/Kconfig        |    9 +++
   9  drivers/pwm/Makefile       |    1 +
  10  drivers/pwm/pwm-mediatek.c |  173 ++++++++++++++++++++++++++++++++++++++++++++
  11  3 files changed, 183 insertions(+)
  12  create mode 100644 drivers/pwm/pwm-mediatek.c
  13
  14 diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
  15 index 062630a..76974ea 100644
  16 --- a/drivers/pwm/Kconfig
  17 +++ b/drivers/pwm/Kconfig
  18 @@ -230,6 +230,15 @@ config PWM_LPSS_PLATFORM
  19           To compile this driver as a module, choose M here: the module
  20           will be called pwm-lpss-platform.
  21
  22 +config PWM_MEDIATEK
  23 +       tristate "Mediatek PWM support"
  24 +       depends on RALINK && OF
  25 +       help
  26 +         Generic PWM framework driver for Mediatek ARM SoC.
  27 +
  28 +         To compile this driver as a module, choose M here: the module
  29 +         will be called pwm-mxs.
  30 +
  31  config PWM_MXS
  32         tristate "Freescale MXS PWM support"
  33         depends on ARCH_MXS && OF
  34 diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
  35 index a0e00c0..aa0bd2e 100644
  36 --- a/drivers/pwm/Makefile
  37 +++ b/drivers/pwm/Makefile
  38 @@ -20,6 +20,7 @@ obj-$(CONFIG_PWM_LPC32XX)     += pwm-lpc32xx.o
  39  obj-$(CONFIG_PWM_LPSS)         += pwm-lpss.o
  40  obj-$(CONFIG_PWM_LPSS_PCI)     += pwm-lpss-pci.o
  41  obj-$(CONFIG_PWM_LPSS_PLATFORM)        += pwm-lpss-platform.o
  42 +obj-$(CONFIG_PWM_MEDIATEK)     += pwm-mediatek.o
  43  obj-$(CONFIG_PWM_MXS)          += pwm-mxs.o
  44  obj-$(CONFIG_PWM_PCA9685)      += pwm-pca9685.o
  45  obj-$(CONFIG_PWM_PUV3)         += pwm-puv3.o
  46 diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
  47 new file mode 100644
  48 index 0000000..f9d8ed4
  49 --- /dev/null
  50 +++ b/drivers/pwm/pwm-mediatek.c
  51 @@ -0,0 +1,173 @@
  52 +/*
  53 + * Mediatek Pulse Width Modulator driver
  54 + *
  55 + * Copyright (C) 2015 John Crispin <blogic@openwrt.org>
  56 + *
  57 + * This file is licensed under the terms of the GNU General Public
  58 + * License version 2. This program is licensed "as is" without any
  59 + * warranty of any kind, whether express or implied.
  60 + */
  61 +
  62 +#include <linux/err.h>
  63 +#include <linux/io.h>
  64 +#include <linux/ioport.h>
  65 +#include <linux/kernel.h>
  66 +#include <linux/module.h>
  67 +#include <linux/of.h>
  68 +#include <linux/platform_device.h>
  69 +#include <linux/pwm.h>
  70 +#include <linux/slab.h>
  71 +#include <linux/types.h>
  72 +
  73 +#define NUM_PWM                4
  74 +
  75 +/* PWM registers and bits definitions */
  76 +#define PWMCON                 0x00
  77 +#define PWMHDUR                        0x04
  78 +#define PWMLDUR                        0x08
  79 +#define PWMGDUR                        0x0c
  80 +#define PWMWAVENUM             0x28
  81 +#define PWMDWIDTH              0x2c
  82 +#define PWMTHRES               0x30
  83 +
  84 +/**
  85 + * struct mtk_pwm_chip - struct representing pwm chip
  86 + *
  87 + * @mmio_base: base address of pwm chip
  88 + * @chip: linux pwm chip representation
  89 + */
  90 +struct mtk_pwm_chip {
  91 +       void __iomem *mmio_base;
  92 +       struct pwm_chip chip;
  93 +};
  94 +
  95 +static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip)
  96 +{
  97 +       return container_of(chip, struct mtk_pwm_chip, chip);
  98 +}
  99 +
 100 +static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num,
 101 +                                 unsigned long offset)
 102 +{
 103 +       return ioread32(chip->mmio_base + 0x10 + (num * 0x40) + offset);
 104 +}
 105 +
 106 +static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip,
 107 +                                   unsigned int num, unsigned long offset,
 108 +                                   unsigned long val)
 109 +{
 110 +       iowrite32(val, chip->mmio_base + 0x10 + (num * 0x40) + offset);
 111 +}
 112 +
 113 +static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 114 +                           int duty_ns, int period_ns)
 115 +{
 116 +       struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
 117 +       u32 resolution = 100 / 4;
 118 +       u32 clkdiv = 0;
 119 +
 120 +       while (period_ns / resolution  > 8191) {
 121 +               clkdiv++;
 122 +               resolution *= 2;
 123 +       }
 124 +
 125 +       if (clkdiv > 7)
 126 +               return -1;
 127 +
 128 +       mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | BIT(3) | clkdiv);
 129 +       mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution);
 130 +       mtk_pwm_writel(pc, pwm->hwpwm, PWMTHRES, duty_ns / resolution);
 131 +       return 0;
 132 +}
 133 +
 134 +static int mtk_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
 135 +{
 136 +       struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
 137 +       u32 val;
 138 +
 139 +       val = ioread32(pc->mmio_base);
 140 +       val |= BIT(pwm->hwpwm);
 141 +       iowrite32(val, pc->mmio_base);
 142 +
 143 +       return 0;
 144 +}
 145 +
 146 +static void mtk_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 147 +{
 148 +       struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
 149 +       u32 val;
 150 +
 151 +       val = ioread32(pc->mmio_base);
 152 +       val &= ~BIT(pwm->hwpwm);
 153 +       iowrite32(val, pc->mmio_base);
 154 +}
 155 +
 156 +static const struct pwm_ops mtk_pwm_ops = {
 157 +       .config = mtk_pwm_config,
 158 +       .enable = mtk_pwm_enable,
 159 +       .disable = mtk_pwm_disable,
 160 +       .owner = THIS_MODULE,
 161 +};
 162 +
 163 +static int mtk_pwm_probe(struct platform_device *pdev)
 164 +{
 165 +       struct mtk_pwm_chip *pc;
 166 +       struct resource *r;
 167 +       int ret;
 168 +
 169 +       pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
 170 +       if (!pc)
 171 +               return -ENOMEM;
 172 +
 173 +       r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 174 +       pc->mmio_base = devm_ioremap_resource(&pdev->dev, r);
 175 +       if (IS_ERR(pc->mmio_base))
 176 +               return PTR_ERR(pc->mmio_base);
 177 +
 178 +       platform_set_drvdata(pdev, pc);
 179 +
 180 +       pc->chip.dev = &pdev->dev;
 181 +       pc->chip.ops = &mtk_pwm_ops;
 182 +       pc->chip.base = -1;
 183 +       pc->chip.npwm = NUM_PWM;
 184 +
 185 +       ret = pwmchip_add(&pc->chip);
 186 +       if (ret < 0)
 187 +               dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
 188 +
 189 +       return ret;
 190 +}
 191 +
 192 +static int mtk_pwm_remove(struct platform_device *pdev)
 193 +{
 194 +       struct mtk_pwm_chip *pc = platform_get_drvdata(pdev);
 195 +       int i;
 196 +
 197 +       for (i = 0; i < NUM_PWM; i++)
 198 +               pwm_disable(&pc->chip.pwms[i]);
 199 +
 200 +       return pwmchip_remove(&pc->chip);
 201 +}
 202 +
 203 +static const struct of_device_id mtk_pwm_of_match[] = {
 204 +       { .compatible = "mediatek,mt7628-pwm" },
 205 +       { }
 206 +};
 207 +
 208 +MODULE_DEVICE_TABLE(of, mtk_pwm_of_match);
 209 +
 210 +static struct platform_driver mtk_pwm_driver = {
 211 +       .driver = {
 212 +               .name = "mtk-pwm",
 213 +               .owner = THIS_MODULE,
 214 +               .of_match_table = mtk_pwm_of_match,
 215 +       },
 216 +       .probe = mtk_pwm_probe,
 217 +       .remove = mtk_pwm_remove,
 218 +};
 219 +
 220 +module_platform_driver(mtk_pwm_driver);
 221 +
 222 +MODULE_LICENSE("GPL");
 223 +MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
 224 +MODULE_ALIAS("platform:mtk-pwm");
 225 --
 226 1.7.10.4
 227