1 From 7adbe9a88c33c6e362a10b109d963b5500a21f00 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Sun, 27 Jul 2014 09:34:05 +0100
4 Subject: [PATCH 25/53] pinctrl: ralink: add pinctrl driver
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 arch/mips/Kconfig | 2 +
9 drivers/pinctrl/Kconfig | 5 +
10 drivers/pinctrl/Makefile | 1 +
11 drivers/pinctrl/pinctrl-rt2880.c | 474 ++++++++++++++++++++++++++++++++++++++
12 4 files changed, 482 insertions(+)
13 create mode 100644 drivers/pinctrl/pinctrl-rt2880.c
15 --- a/arch/mips/Kconfig
16 +++ b/arch/mips/Kconfig
17 @@ -557,6 +557,8 @@ config RALINK
19 select ARCH_HAS_RESET_CONTROLLER
20 select RESET_CONTROLLER
22 + select PINCTRL_RT2880
25 bool "SGI IP22 (Indy/Indigo2)"
26 --- a/drivers/pinctrl/Kconfig
27 +++ b/drivers/pinctrl/Kconfig
28 @@ -103,6 +103,11 @@ config PINCTRL_LPC18XX
30 Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU).
32 +config PINCTRL_RT2880
40 --- a/drivers/pinctrl/Makefile
41 +++ b/drivers/pinctrl/Makefile
42 @@ -19,6 +19,7 @@ obj-$(CONFIG_PINCTRL_MESON) += meson/
43 obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o
44 obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o
45 obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
46 +obj-$(CONFIG_PINCTRL_RT2880) += pinctrl-rt2880.o
47 obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
48 obj-$(CONFIG_PINCTRL_SIRF) += sirf/
49 obj-$(CONFIG_PINCTRL_TEGRA) += pinctrl-tegra.o
51 +++ b/drivers/pinctrl/pinctrl-rt2880.c
54 + * linux/drivers/pinctrl/pinctrl-rt2880.c
56 + * This program is free software; you can redistribute it and/or modify
57 + * it under the terms of the GNU General Public License version 2 as
58 + * publishhed by the Free Software Foundation.
60 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
63 +#include <linux/module.h>
64 +#include <linux/device.h>
65 +#include <linux/io.h>
66 +#include <linux/platform_device.h>
67 +#include <linux/slab.h>
68 +#include <linux/of.h>
69 +#include <linux/pinctrl/pinctrl.h>
70 +#include <linux/pinctrl/pinconf.h>
71 +#include <linux/pinctrl/pinmux.h>
72 +#include <linux/pinctrl/consumer.h>
73 +#include <linux/pinctrl/machine.h>
75 +#include <asm/mach-ralink/ralink_regs.h>
76 +#include <asm/mach-ralink/pinmux.h>
77 +#include <asm/mach-ralink/mt7620.h>
81 +#define SYSC_REG_GPIO_MODE 0x60
82 +#define SYSC_REG_GPIO_MODE2 0x64
87 + struct pinctrl_pin_desc *pads;
88 + struct pinctrl_desc *desc;
90 + struct rt2880_pmx_func **func;
93 + struct rt2880_pmx_group *groups;
94 + const char **group_names;
101 +struct rt2880_pmx_group *rt2880_pinmux_data = NULL;
103 +static int rt2880_get_group_count(struct pinctrl_dev *pctrldev)
105 + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
107 + return p->group_count;
110 +static const char *rt2880_get_group_name(struct pinctrl_dev *pctrldev,
113 + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
115 + if (group >= p->group_count)
118 + return p->group_names[group];
121 +static int rt2880_get_group_pins(struct pinctrl_dev *pctrldev,
123 + const unsigned **pins,
124 + unsigned *num_pins)
126 + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
128 + if (group >= p->group_count)
131 + *pins = p->groups[group].func[0].pins;
132 + *num_pins = p->groups[group].func[0].pin_count;
137 +static void rt2880_pinctrl_dt_free_map(struct pinctrl_dev *pctrldev,
138 + struct pinctrl_map *map, unsigned num_maps)
142 + for (i = 0; i < num_maps; i++)
143 + if (map[i].type == PIN_MAP_TYPE_CONFIGS_PIN ||
144 + map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
145 + kfree(map[i].data.configs.configs);
149 +static void rt2880_pinctrl_pin_dbg_show(struct pinctrl_dev *pctrldev,
150 + struct seq_file *s,
153 + seq_printf(s, "ralink pio");
156 +static void rt2880_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctrldev,
157 + struct device_node *np,
158 + struct pinctrl_map **map)
160 + const char *function;
161 + int func = of_property_read_string(np, "ralink,function", &function);
162 + int grps = of_property_count_strings(np, "ralink,group");
168 + for (i = 0; i < grps; i++) {
171 + of_property_read_string_index(np, "ralink,group", i, &group);
173 + (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
174 + (*map)->name = function;
175 + (*map)->data.mux.group = group;
176 + (*map)->data.mux.function = function;
181 +static int rt2880_pinctrl_dt_node_to_map(struct pinctrl_dev *pctrldev,
182 + struct device_node *np_config,
183 + struct pinctrl_map **map,
184 + unsigned *num_maps)
187 + struct pinctrl_map *tmp;
188 + struct device_node *np;
190 + for_each_child_of_node(np_config, np) {
191 + int ret = of_property_count_strings(np, "ralink,group");
200 + *map = kzalloc(max_maps * sizeof(struct pinctrl_map), GFP_KERNEL);
206 + for_each_child_of_node(np_config, np)
207 + rt2880_pinctrl_dt_subnode_to_map(pctrldev, np, &tmp);
208 + *num_maps = max_maps;
213 +static const struct pinctrl_ops rt2880_pctrl_ops = {
214 + .get_groups_count = rt2880_get_group_count,
215 + .get_group_name = rt2880_get_group_name,
216 + .get_group_pins = rt2880_get_group_pins,
217 + .pin_dbg_show = rt2880_pinctrl_pin_dbg_show,
218 + .dt_node_to_map = rt2880_pinctrl_dt_node_to_map,
219 + .dt_free_map = rt2880_pinctrl_dt_free_map,
222 +static int rt2880_pmx_func_count(struct pinctrl_dev *pctrldev)
224 + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
226 + return p->func_count;
229 +static const char *rt2880_pmx_func_name(struct pinctrl_dev *pctrldev,
232 + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
234 + return p->func[func]->name;
237 +static int rt2880_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
239 + const char * const **groups,
240 + unsigned * const num_groups)
242 + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
244 + if (p->func[func]->group_count == 1)
245 + *groups = &p->group_names[p->func[func]->groups[0]];
247 + *groups = p->group_names;
249 + *num_groups = p->func[func]->group_count;
254 +static int rt2880_pmx_group_enable(struct pinctrl_dev *pctrldev,
258 + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
260 + u32 reg = SYSC_REG_GPIO_MODE;
264 + /* dont allow double use */
265 + if (p->groups[group].enabled) {
266 + dev_err(p->dev, "%s is already enabled\n", p->groups[group].name);
270 + p->groups[group].enabled = 1;
271 + p->func[func]->enabled = 1;
273 + shift = p->groups[group].shift;
276 + reg = SYSC_REG_GPIO_MODE2;
278 + mode = rt_sysc_r32(reg);
279 + mode &= ~(p->groups[group].mask << shift);
281 + /* mark the pins as gpio */
282 + for (i = 0; i < p->groups[group].func[0].pin_count; i++)
283 + p->gpio[p->groups[group].func[0].pins[i]] = 1;
285 + /* function 0 is gpio and needs special handling */
287 + mode |= p->groups[group].gpio << shift;
289 + for (i = 0; i < p->func[func]->pin_count; i++)
290 + p->gpio[p->func[func]->pins[i]] = 0;
291 + mode |= p->func[func]->value << shift;
293 + rt_sysc_w32(mode, reg);
298 +static int rt2880_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
299 + struct pinctrl_gpio_range *range,
302 + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
304 + if (!p->gpio[pin]) {
305 + dev_err(p->dev, "pin %d is not set to gpio mux\n", pin);
312 +static const struct pinmux_ops rt2880_pmx_group_ops = {
313 + .get_functions_count = rt2880_pmx_func_count,
314 + .get_function_name = rt2880_pmx_func_name,
315 + .get_function_groups = rt2880_pmx_group_get_groups,
316 + .set_mux = rt2880_pmx_group_enable,
317 + .gpio_request_enable = rt2880_pmx_group_gpio_request_enable,
320 +static struct pinctrl_desc rt2880_pctrl_desc = {
321 + .owner = THIS_MODULE,
322 + .name = "rt2880-pinmux",
323 + .pctlops = &rt2880_pctrl_ops,
324 + .pmxops = &rt2880_pmx_group_ops,
327 +static struct rt2880_pmx_func gpio_func = {
331 +static int rt2880_pinmux_index(struct rt2880_priv *p)
333 + struct rt2880_pmx_func **f;
334 + struct rt2880_pmx_group *mux = p->groups;
337 + /* count the mux functions */
338 + while (mux->name) {
343 + /* allocate the group names array needed by the gpio function */
344 + p->group_names = devm_kzalloc(p->dev, sizeof(char *) * p->group_count, GFP_KERNEL);
345 + if (!p->group_names)
348 + for (i = 0; i < p->group_count; i++) {
349 + p->group_names[i] = p->groups[i].name;
350 + p->func_count += p->groups[i].func_count;
353 + /* we have a dummy function[0] for gpio */
356 + /* allocate our function and group mapping index buffers */
357 + f = p->func = devm_kzalloc(p->dev, sizeof(struct rt2880_pmx_func) * p->func_count, GFP_KERNEL);
358 + gpio_func.groups = devm_kzalloc(p->dev, sizeof(int) * p->group_count, GFP_KERNEL);
359 + if (!f || !gpio_func.groups)
362 + /* add a backpointer to the function so it knows its group */
363 + gpio_func.group_count = p->group_count;
364 + for (i = 0; i < gpio_func.group_count; i++)
365 + gpio_func.groups[i] = i;
370 + /* add remaining functions */
371 + for (i = 0; i < p->group_count; i++) {
372 + for (j = 0; j < p->groups[i].func_count; j++) {
373 + f[c] = &p->groups[i].func[j];
374 + f[c]->groups = devm_kzalloc(p->dev, sizeof(int), GFP_KERNEL);
375 + f[c]->groups[0] = i;
376 + f[c]->group_count = 1;
383 +static int rt2880_pinmux_pins(struct rt2880_priv *p)
387 + /* loop over the functions and initialize the pins array. also work out the highest pin used */
388 + for (i = 0; i < p->func_count; i++) {
391 + if (!p->func[i]->pin_count)
394 + p->func[i]->pins = devm_kzalloc(p->dev, sizeof(int) * p->func[i]->pin_count, GFP_KERNEL);
395 + for (j = 0; j < p->func[i]->pin_count; j++)
396 + p->func[i]->pins[j] = p->func[i]->pin_first + j;
398 + pin = p->func[i]->pin_first + p->func[i]->pin_count;
399 + if (pin > p->max_pins)
403 + /* the buffer that tells us which pins are gpio */
404 + p->gpio = devm_kzalloc(p->dev,sizeof(uint8_t) * p->max_pins,
406 + /* the pads needed to tell pinctrl about our pins */
407 + p->pads = devm_kzalloc(p->dev,
408 + sizeof(struct pinctrl_pin_desc) * p->max_pins,
410 + if (!p->pads || !p->gpio ) {
411 + dev_err(p->dev, "Failed to allocate gpio data\n");
415 + memset(p->gpio, 1, sizeof(uint8_t) * p->max_pins);
416 + for (i = 0; i < p->func_count; i++) {
417 + if (!p->func[i]->pin_count)
420 + for (j = 0; j < p->func[i]->pin_count; j++)
421 + p->gpio[p->func[i]->pins[j]] = 0;
424 + /* pin 0 is always a gpio */
428 + for (i = 0; i < p->max_pins; i++) {
429 + /* strlen("ioXY") + 1 = 5 */
430 + char *name = devm_kzalloc(p->dev, 5, GFP_KERNEL);
433 + dev_err(p->dev, "Failed to allocate pad name\n");
436 + snprintf(name, 5, "io%d", i);
437 + p->pads[i].number = i;
438 + p->pads[i].name = name;
440 + p->desc->pins = p->pads;
441 + p->desc->npins = p->max_pins;
446 +static int rt2880_pinmux_probe(struct platform_device *pdev)
448 + struct rt2880_priv *p;
449 + struct pinctrl_dev *dev;
450 + struct device_node *np;
452 + if (!rt2880_pinmux_data)
455 + /* setup the private data */
456 + p = devm_kzalloc(&pdev->dev, sizeof(struct rt2880_priv), GFP_KERNEL);
460 + p->dev = &pdev->dev;
461 + p->desc = &rt2880_pctrl_desc;
462 + p->groups = rt2880_pinmux_data;
463 + platform_set_drvdata(pdev, p);
465 + /* init the device */
466 + if (rt2880_pinmux_index(p)) {
467 + dev_err(&pdev->dev, "failed to load index\n");
470 + if (rt2880_pinmux_pins(p)) {
471 + dev_err(&pdev->dev, "failed to load pins\n");
474 + dev = pinctrl_register(p->desc, &pdev->dev, p);
476 + return PTR_ERR(dev);
478 + /* finalize by adding gpio ranges for enables gpio controllers */
479 + for_each_compatible_node(np, NULL, "ralink,rt2880-gpio") {
480 + const __be32 *ngpio, *gpiobase;
481 + struct pinctrl_gpio_range *range;
484 + if (!of_device_is_available(np))
487 + ngpio = of_get_property(np, "ralink,num-gpios", NULL);
488 + gpiobase = of_get_property(np, "ralink,gpio-base", NULL);
489 + if (!ngpio || !gpiobase) {
490 + dev_err(&pdev->dev, "failed to load chip info\n");
494 + range = devm_kzalloc(p->dev, sizeof(struct pinctrl_gpio_range) + 4, GFP_KERNEL);
495 + range->name = name = (char *) &range[1];
496 + sprintf(name, "pio");
497 + range->npins = __be32_to_cpu(*ngpio);
498 + range->base = __be32_to_cpu(*gpiobase);
499 + range->pin_base = range->base;
500 + pinctrl_add_gpio_range(dev, range);
506 +static const struct of_device_id rt2880_pinmux_match[] = {
507 + { .compatible = "ralink,rt2880-pinmux" },
510 +MODULE_DEVICE_TABLE(of, rt2880_pinmux_match);
512 +static struct platform_driver rt2880_pinmux_driver = {
513 + .probe = rt2880_pinmux_probe,
515 + .name = "rt2880-pinmux",
516 + .owner = THIS_MODULE,
517 + .of_match_table = rt2880_pinmux_match,
521 +int __init rt2880_pinmux_init(void)
523 + return platform_driver_register(&rt2880_pinmux_driver);
526 +core_initcall_sync(rt2880_pinmux_init);