target/linux/ramips/patches-4.3/0025-pinctrl-ralink-add-pinctrl-driver.patch

   1 From 7adbe9a88c33c6e362a10b109d963b5500a21f00 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sun, 27 Jul 2014 09:34:05 +0100
   4 Subject: [PATCH 25/53] pinctrl: ralink: add pinctrl driver
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/Kconfig                |    2 +
   9  drivers/pinctrl/Kconfig          |    5 +
  10  drivers/pinctrl/Makefile         |    1 +
  11  drivers/pinctrl/pinctrl-rt2880.c |  474 ++++++++++++++++++++++++++++++++++++++
  12  4 files changed, 482 insertions(+)
  13  create mode 100644 drivers/pinctrl/pinctrl-rt2880.c
  14
  15 diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
  16 index e3aa5b0..0098bff 100644
  17 --- a/arch/mips/Kconfig
  18 +++ b/arch/mips/Kconfig
  19 @@ -557,6 +557,8 @@ config RALINK
  20         select CLKDEV_LOOKUP
  21         select ARCH_HAS_RESET_CONTROLLER
  22         select RESET_CONTROLLER
  23 +       select PINCTRL
  24 +       select PINCTRL_RT2880
  25
  26  config SGI_IP22
  27         bool "SGI IP22 (Indy/Indigo2)"
  28 diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
  29 index 84dd2ed..d016935 100644
  30 --- a/drivers/pinctrl/Kconfig
  31 +++ b/drivers/pinctrl/Kconfig
  32 @@ -103,6 +103,11 @@ config PINCTRL_LPC18XX
  33         help
  34           Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU).
  35
  36 +config PINCTRL_RT2880
  37 +       bool
  38 +       depends on RALINK
  39 +       select PINMUX
  40 +
  41  config PINCTRL_FALCON
  42         bool
  43         depends on SOC_FALCON
  44 diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
  45 index cad077c..0c86632 100644
  46 --- a/drivers/pinctrl/Makefile
  47 +++ b/drivers/pinctrl/Makefile
  48 @@ -19,6 +19,7 @@ obj-$(CONFIG_PINCTRL_MESON)   += meson/
  49  obj-$(CONFIG_PINCTRL_PALMAS)   += pinctrl-palmas.o
  50  obj-$(CONFIG_PINCTRL_PISTACHIO)        += pinctrl-pistachio.o
  51  obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
  52 +obj-$(CONFIG_PINCTRL_RT2880)   += pinctrl-rt2880.o
  53  obj-$(CONFIG_PINCTRL_SINGLE)   += pinctrl-single.o
  54  obj-$(CONFIG_PINCTRL_SIRF)     += sirf/
  55  obj-$(CONFIG_PINCTRL_TEGRA)    += pinctrl-tegra.o
  56 diff --git a/drivers/pinctrl/pinctrl-rt2880.c b/drivers/pinctrl/pinctrl-rt2880.c
  57 new file mode 100644
  58 index 0000000..fe0af77
  59 --- /dev/null
  60 +++ b/drivers/pinctrl/pinctrl-rt2880.c
  61 @@ -0,0 +1,474 @@
  62 +/*
  63 + *  linux/drivers/pinctrl/pinctrl-rt2880.c
  64 + *
  65 + *  This program is free software; you can redistribute it and/or modify
  66 + *  it under the terms of the GNU General Public License version 2 as
  67 + *  publishhed by the Free Software Foundation.
  68 + *
  69 + *  Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  70 + */
  71 +
  72 +#include <linux/module.h>
  73 +#include <linux/device.h>
  74 +#include <linux/io.h>
  75 +#include <linux/platform_device.h>
  76 +#include <linux/slab.h>
  77 +#include <linux/of.h>
  78 +#include <linux/pinctrl/pinctrl.h>
  79 +#include <linux/pinctrl/pinconf.h>
  80 +#include <linux/pinctrl/pinmux.h>
  81 +#include <linux/pinctrl/consumer.h>
  82 +#include <linux/pinctrl/machine.h>
  83 +
  84 +#include <asm/mach-ralink/ralink_regs.h>
  85 +#include <asm/mach-ralink/pinmux.h>
  86 +#include <asm/mach-ralink/mt7620.h>
  87 +
  88 +#include "core.h"
  89 +
  90 +#define SYSC_REG_GPIO_MODE     0x60
  91 +#define SYSC_REG_GPIO_MODE2    0x64
  92 +
  93 +struct rt2880_priv {
  94 +       struct device *dev;
  95 +
  96 +       struct pinctrl_pin_desc *pads;
  97 +       struct pinctrl_desc *desc;
  98 +
  99 +       struct rt2880_pmx_func **func;
 100 +       int func_count;
 101 +
 102 +       struct rt2880_pmx_group *groups;
 103 +       const char **group_names;
 104 +       int group_count;
 105 +
 106 +       uint8_t *gpio;
 107 +       int max_pins;
 108 +};
 109 +
 110 +struct rt2880_pmx_group *rt2880_pinmux_data = NULL;
 111 +
 112 +static int rt2880_get_group_count(struct pinctrl_dev *pctrldev)
 113 +{
 114 +       struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
 115 +
 116 +       return p->group_count;
 117 +}
 118 +
 119 +static const char *rt2880_get_group_name(struct pinctrl_dev *pctrldev,
 120 +                                        unsigned group)
 121 +{
 122 +       struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
 123 +
 124 +       if (group >= p->group_count)
 125 +               return NULL;
 126 +
 127 +       return p->group_names[group];
 128 +}
 129 +
 130 +static int rt2880_get_group_pins(struct pinctrl_dev *pctrldev,
 131 +                                unsigned group,
 132 +                                const unsigned **pins,
 133 +                                unsigned *num_pins)
 134 +{
 135 +       struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
 136 +
 137 +       if (group >= p->group_count)
 138 +               return -EINVAL;
 139 +
 140 +       *pins = p->groups[group].func[0].pins;
 141 +       *num_pins = p->groups[group].func[0].pin_count;
 142 +
 143 +       return 0;
 144 +}
 145 +
 146 +static void rt2880_pinctrl_dt_free_map(struct pinctrl_dev *pctrldev,
 147 +                                   struct pinctrl_map *map, unsigned num_maps)
 148 +{
 149 +       int i;
 150 +
 151 +       for (i = 0; i < num_maps; i++)
 152 +               if (map[i].type == PIN_MAP_TYPE_CONFIGS_PIN ||
 153 +                   map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
 154 +                       kfree(map[i].data.configs.configs);
 155 +       kfree(map);
 156 +}
 157 +
 158 +static void rt2880_pinctrl_pin_dbg_show(struct pinctrl_dev *pctrldev,
 159 +                                       struct seq_file *s,
 160 +                                       unsigned offset)
 161 +{
 162 +       seq_printf(s, "ralink pio");
 163 +}
 164 +
 165 +static void rt2880_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctrldev,
 166 +                               struct device_node *np,
 167 +                               struct pinctrl_map **map)
 168 +{
 169 +        const char *function;
 170 +       int func = of_property_read_string(np, "ralink,function", &function);
 171 +       int grps = of_property_count_strings(np, "ralink,group");
 172 +       int i;
 173 +
 174 +       if (func || !grps)
 175 +               return;
 176 +
 177 +       for (i = 0; i < grps; i++) {
 178 +               const char *group;
 179 +
 180 +               of_property_read_string_index(np, "ralink,group", i, &group);
 181 +
 182 +               (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
 183 +               (*map)->name = function;
 184 +               (*map)->data.mux.group = group;
 185 +               (*map)->data.mux.function = function;
 186 +               (*map)++;
 187 +       }
 188 +}
 189 +
 190 +static int rt2880_pinctrl_dt_node_to_map(struct pinctrl_dev *pctrldev,
 191 +                               struct device_node *np_config,
 192 +                               struct pinctrl_map **map,
 193 +                               unsigned *num_maps)
 194 +{
 195 +       int max_maps = 0;
 196 +       struct pinctrl_map *tmp;
 197 +       struct device_node *np;
 198 +
 199 +       for_each_child_of_node(np_config, np) {
 200 +               int ret = of_property_count_strings(np, "ralink,group");
 201 +
 202 +               if (ret >= 0)
 203 +                       max_maps += ret;
 204 +       }
 205 +
 206 +       if (!max_maps)
 207 +               return max_maps;
 208 +
 209 +       *map = kzalloc(max_maps * sizeof(struct pinctrl_map), GFP_KERNEL);
 210 +       if (!*map)
 211 +               return -ENOMEM;
 212 +
 213 +       tmp = *map;
 214 +
 215 +       for_each_child_of_node(np_config, np)
 216 +               rt2880_pinctrl_dt_subnode_to_map(pctrldev, np, &tmp);
 217 +       *num_maps = max_maps;
 218 +
 219 +       return 0;
 220 +}
 221 +
 222 +static const struct pinctrl_ops rt2880_pctrl_ops = {
 223 +       .get_groups_count       = rt2880_get_group_count,
 224 +       .get_group_name         = rt2880_get_group_name,
 225 +       .get_group_pins         = rt2880_get_group_pins,
 226 +       .pin_dbg_show           = rt2880_pinctrl_pin_dbg_show,
 227 +       .dt_node_to_map         = rt2880_pinctrl_dt_node_to_map,
 228 +       .dt_free_map            = rt2880_pinctrl_dt_free_map,
 229 +};
 230 +
 231 +static int rt2880_pmx_func_count(struct pinctrl_dev *pctrldev)
 232 +{
 233 +       struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
 234 +
 235 +       return p->func_count;
 236 +}
 237 +
 238 +static const char *rt2880_pmx_func_name(struct pinctrl_dev *pctrldev,
 239 +                                        unsigned func)
 240 +{
 241 +       struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
 242 +
 243 +       return p->func[func]->name;
 244 +}
 245 +
 246 +static int rt2880_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
 247 +                               unsigned func,
 248 +                               const char * const **groups,
 249 +                               unsigned * const num_groups)
 250 +{
 251 +       struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
 252 +
 253 +       if (p->func[func]->group_count == 1)
 254 +               *groups = &p->group_names[p->func[func]->groups[0]];
 255 +       else
 256 +               *groups = p->group_names;
 257 +
 258 +       *num_groups = p->func[func]->group_count;
 259 +
 260 +       return 0;
 261 +}
 262 +
 263 +static int rt2880_pmx_group_enable(struct pinctrl_dev *pctrldev,
 264 +                               unsigned func,
 265 +                               unsigned group)
 266 +{
 267 +       struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
 268 +        u32 mode = 0;
 269 +       u32 reg = SYSC_REG_GPIO_MODE;
 270 +       int i;
 271 +       int shift;
 272 +
 273 +       /* dont allow double use */
 274 +       if (p->groups[group].enabled) {
 275 +               dev_err(p->dev, "%s is already enabled\n", p->groups[group].name);
 276 +               return -EBUSY;
 277 +       }
 278 +
 279 +       p->groups[group].enabled = 1;
 280 +       p->func[func]->enabled = 1;
 281 +
 282 +       shift = p->groups[group].shift;
 283 +       if (shift >= 32) {
 284 +               shift -= 32;
 285 +               reg = SYSC_REG_GPIO_MODE2;
 286 +       }
 287 +       mode = rt_sysc_r32(reg);
 288 +       mode &= ~(p->groups[group].mask << shift);
 289 +
 290 +       /* mark the pins as gpio */
 291 +       for (i = 0; i < p->groups[group].func[0].pin_count; i++)
 292 +               p->gpio[p->groups[group].func[0].pins[i]] = 1;
 293 +
 294 +       /* function 0 is gpio and needs special handling */
 295 +       if (func == 0) {
 296 +               mode |= p->groups[group].gpio << shift;
 297 +       } else {
 298 +               for (i = 0; i < p->func[func]->pin_count; i++)
 299 +                       p->gpio[p->func[func]->pins[i]] = 0;
 300 +               mode |= p->func[func]->value << shift;
 301 +       }
 302 +       rt_sysc_w32(mode, reg);
 303 +
 304 +       return 0;
 305 +}
 306 +
 307 +static int rt2880_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
 308 +                               struct pinctrl_gpio_range *range,
 309 +                               unsigned pin)
 310 +{
 311 +       struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
 312 +
 313 +       if (!p->gpio[pin]) {
 314 +               dev_err(p->dev, "pin %d is not set to gpio mux\n", pin);
 315 +               return -EINVAL;
 316 +       }
 317 +
 318 +       return 0;
 319 +}
 320 +
 321 +static const struct pinmux_ops rt2880_pmx_group_ops = {
 322 +       .get_functions_count    = rt2880_pmx_func_count,
 323 +       .get_function_name      = rt2880_pmx_func_name,
 324 +       .get_function_groups    = rt2880_pmx_group_get_groups,
 325 +       .set_mux                = rt2880_pmx_group_enable,
 326 +       .gpio_request_enable    = rt2880_pmx_group_gpio_request_enable,
 327 +};
 328 +
 329 +static struct pinctrl_desc rt2880_pctrl_desc = {
 330 +       .owner          = THIS_MODULE,
 331 +       .name           = "rt2880-pinmux",
 332 +       .pctlops        = &rt2880_pctrl_ops,
 333 +       .pmxops         = &rt2880_pmx_group_ops,
 334 +};
 335 +
 336 +static struct rt2880_pmx_func gpio_func = {
 337 +       .name = "gpio",
 338 +};
 339 +
 340 +static int rt2880_pinmux_index(struct rt2880_priv *p)
 341 +{
 342 +       struct rt2880_pmx_func **f;
 343 +       struct rt2880_pmx_group *mux = p->groups;
 344 +       int i, j, c = 0;
 345 +
 346 +       /* count the mux functions */
 347 +       while (mux->name) {
 348 +               p->group_count++;
 349 +               mux++;
 350 +       }
 351 +
 352 +       /* allocate the group names array needed by the gpio function */
 353 +       p->group_names = devm_kzalloc(p->dev, sizeof(char *) * p->group_count, GFP_KERNEL);
 354 +       if (!p->group_names)
 355 +               return -1;
 356 +
 357 +       for (i = 0; i < p->group_count; i++) {
 358 +               p->group_names[i] = p->groups[i].name;
 359 +               p->func_count += p->groups[i].func_count;
 360 +       }
 361 +
 362 +       /* we have a dummy function[0] for gpio */
 363 +       p->func_count++;
 364 +
 365 +       /* allocate our function and group mapping index buffers */
 366 +       f = p->func = devm_kzalloc(p->dev, sizeof(struct rt2880_pmx_func) * p->func_count, GFP_KERNEL);
 367 +       gpio_func.groups = devm_kzalloc(p->dev, sizeof(int) * p->group_count, GFP_KERNEL);
 368 +       if (!f || !gpio_func.groups)
 369 +               return -1;
 370 +
 371 +       /* add a backpointer to the function so it knows its group */
 372 +       gpio_func.group_count = p->group_count;
 373 +       for (i = 0; i < gpio_func.group_count; i++)
 374 +               gpio_func.groups[i] = i;
 375 +
 376 +       f[c] = &gpio_func;
 377 +       c++;
 378 +
 379 +       /* add remaining functions */
 380 +       for (i = 0; i < p->group_count; i++) {
 381 +               for (j = 0; j < p->groups[i].func_count; j++) {
 382 +                       f[c] = &p->groups[i].func[j];
 383 +                       f[c]->groups = devm_kzalloc(p->dev, sizeof(int), GFP_KERNEL);
 384 +                       f[c]->groups[0] = i;
 385 +                       f[c]->group_count = 1;
 386 +                       c++;
 387 +               }
 388 +       }
 389 +       return 0;
 390 +}
 391 +
 392 +static int rt2880_pinmux_pins(struct rt2880_priv *p)
 393 +{
 394 +       int i, j;
 395 +
 396 +       /* loop over the functions and initialize the pins array. also work out the highest pin used */
 397 +       for (i = 0; i < p->func_count; i++) {
 398 +               int pin;
 399 +
 400 +               if (!p->func[i]->pin_count)
 401 +                       continue;
 402 +
 403 +               p->func[i]->pins = devm_kzalloc(p->dev, sizeof(int) * p->func[i]->pin_count, GFP_KERNEL);
 404 +               for (j = 0; j < p->func[i]->pin_count; j++)
 405 +                       p->func[i]->pins[j] = p->func[i]->pin_first + j;
 406 +
 407 +               pin = p->func[i]->pin_first + p->func[i]->pin_count;
 408 +               if (pin > p->max_pins)
 409 +                       p->max_pins = pin;
 410 +       }
 411 +
 412 +       /* the buffer that tells us which pins are gpio */
 413 +       p->gpio = devm_kzalloc(p->dev,sizeof(uint8_t) * p->max_pins,
 414 +               GFP_KERNEL);
 415 +       /* the pads needed to tell pinctrl about our pins */
 416 +       p->pads = devm_kzalloc(p->dev,
 417 +               sizeof(struct pinctrl_pin_desc) * p->max_pins,
 418 +               GFP_KERNEL);
 419 +       if (!p->pads || !p->gpio ) {
 420 +               dev_err(p->dev, "Failed to allocate gpio data\n");
 421 +               return -ENOMEM;
 422 +       }
 423 +
 424 +       memset(p->gpio, 1, sizeof(uint8_t) * p->max_pins);
 425 +       for (i = 0; i < p->func_count; i++) {
 426 +               if (!p->func[i]->pin_count)
 427 +                       continue;
 428 +
 429 +               for (j = 0; j < p->func[i]->pin_count; j++)
 430 +                       p->gpio[p->func[i]->pins[j]] = 0;
 431 +       }
 432 +
 433 +       /* pin 0 is always a gpio */
 434 +       p->gpio[0] = 1;
 435 +
 436 +       /* set the pads */
 437 +       for (i = 0; i < p->max_pins; i++) {
 438 +               /* strlen("ioXY") + 1 = 5 */
 439 +               char *name = devm_kzalloc(p->dev, 5, GFP_KERNEL);
 440 +
 441 +               if (!name) {
 442 +                       dev_err(p->dev, "Failed to allocate pad name\n");
 443 +                       return -ENOMEM;
 444 +               }
 445 +               snprintf(name, 5, "io%d", i);
 446 +               p->pads[i].number = i;
 447 +               p->pads[i].name = name;
 448 +       }
 449 +       p->desc->pins = p->pads;
 450 +       p->desc->npins = p->max_pins;
 451 +
 452 +       return 0;
 453 +}
 454 +
 455 +static int rt2880_pinmux_probe(struct platform_device *pdev)
 456 +{
 457 +       struct rt2880_priv *p;
 458 +       struct pinctrl_dev *dev;
 459 +       struct device_node *np;
 460 +
 461 +       if (!rt2880_pinmux_data)
 462 +               return -ENOSYS;
 463 +
 464 +       /* setup the private data */
 465 +       p = devm_kzalloc(&pdev->dev, sizeof(struct rt2880_priv), GFP_KERNEL);
 466 +       if (!p)
 467 +               return -ENOMEM;
 468 +
 469 +       p->dev = &pdev->dev;
 470 +       p->desc = &rt2880_pctrl_desc;
 471 +       p->groups = rt2880_pinmux_data;
 472 +       platform_set_drvdata(pdev, p);
 473 +
 474 +       /* init the device */
 475 +       if (rt2880_pinmux_index(p)) {
 476 +               dev_err(&pdev->dev, "failed to load index\n");
 477 +               return -EINVAL;
 478 +       }
 479 +       if (rt2880_pinmux_pins(p)) {
 480 +               dev_err(&pdev->dev, "failed to load pins\n");
 481 +               return -EINVAL;
 482 +       }
 483 +       dev = pinctrl_register(p->desc, &pdev->dev, p);
 484 +       if (IS_ERR(dev))
 485 +               return PTR_ERR(dev);
 486 +
 487 +       /* finalize by adding gpio ranges for enables gpio controllers */
 488 +       for_each_compatible_node(np, NULL, "ralink,rt2880-gpio") {
 489 +               const __be32 *ngpio, *gpiobase;
 490 +               struct pinctrl_gpio_range *range;
 491 +               char *name;
 492 +
 493 +               if (!of_device_is_available(np))
 494 +                       continue;
 495 +
 496 +               ngpio = of_get_property(np, "ralink,num-gpios", NULL);
 497 +               gpiobase = of_get_property(np, "ralink,gpio-base", NULL);
 498 +               if (!ngpio || !gpiobase) {
 499 +                       dev_err(&pdev->dev, "failed to load chip info\n");
 500 +                       return -EINVAL;
 501 +               }
 502 +
 503 +               range = devm_kzalloc(p->dev, sizeof(struct pinctrl_gpio_range) + 4, GFP_KERNEL);
 504 +               range->name = name = (char *) &range[1];
 505 +               sprintf(name, "pio");
 506 +               range->npins = __be32_to_cpu(*ngpio);
 507 +               range->base = __be32_to_cpu(*gpiobase);
 508 +               range->pin_base = range->base;
 509 +               pinctrl_add_gpio_range(dev, range);
 510 +       }
 511 +
 512 +       return 0;
 513 +}
 514 +
 515 +static const struct of_device_id rt2880_pinmux_match[] = {
 516 +       { .compatible = "ralink,rt2880-pinmux" },
 517 +       {},
 518 +};
 519 +MODULE_DEVICE_TABLE(of, rt2880_pinmux_match);
 520 +
 521 +static struct platform_driver rt2880_pinmux_driver = {
 522 +       .probe = rt2880_pinmux_probe,
 523 +       .driver = {
 524 +               .name = "rt2880-pinmux",
 525 +               .owner = THIS_MODULE,
 526 +               .of_match_table = rt2880_pinmux_match,
 527 +       },
 528 +};
 529 +
 530 +int __init rt2880_pinmux_init(void)
 531 +{
 532 +       return platform_driver_register(&rt2880_pinmux_driver);
 533 +}
 534 +
 535 +core_initcall_sync(rt2880_pinmux_init);
 536 --
 537 1.7.10.4
 538