1 From 0315355131c46c42164a4b180363bc79728f7015 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 7 Dec 2015 17:27:15 +0100
4 Subject: [PATCH 20/53] arch: mips: ralink: mt7628 fixes
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 arch/mips/ralink/mt7620.c | 76 +++++++++++++++++++++++++++++----------------
9 1 file changed, 50 insertions(+), 26 deletions(-)
11 diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
12 index 794a7c7..41b4a3e 100644
13 --- a/arch/mips/ralink/mt7620.c
14 +++ b/arch/mips/ralink/mt7620.c
15 @@ -104,28 +104,28 @@ static struct rt2880_pmx_group mt7620a_pinmux_data[] = {
18 static struct rt2880_pmx_func pwm1_grp_mt7628[] = {
19 - FUNC("sdcx", 3, 19, 1),
20 + FUNC("sdcx d6", 3, 19, 1),
21 FUNC("utif", 2, 19, 1),
22 FUNC("gpio", 1, 19, 1),
23 - FUNC("pwm", 0, 19, 1),
24 + FUNC("pwm1", 0, 19, 1),
27 static struct rt2880_pmx_func pwm0_grp_mt7628[] = {
28 - FUNC("sdcx", 3, 18, 1),
29 + FUNC("sdcx d7", 3, 18, 1),
30 FUNC("utif", 2, 18, 1),
31 FUNC("gpio", 1, 18, 1),
32 - FUNC("pwm", 0, 18, 1),
33 + FUNC("pwm0", 0, 18, 1),
36 static struct rt2880_pmx_func uart2_grp_mt7628[] = {
37 - FUNC("sdcx", 3, 20, 2),
38 + FUNC("sdcx d5 d4", 3, 20, 2),
39 FUNC("pwm", 2, 20, 2),
40 FUNC("gpio", 1, 20, 2),
41 FUNC("uart", 0, 20, 2),
44 static struct rt2880_pmx_func uart1_grp_mt7628[] = {
45 - FUNC("sdcx", 3, 45, 2),
46 + FUNC("sw_r", 3, 45, 2),
47 FUNC("pwm", 2, 45, 2),
48 FUNC("gpio", 1, 45, 2),
49 FUNC("uart", 0, 45, 2),
50 @@ -168,7 +168,7 @@ static struct rt2880_pmx_func spi_cs1_grp_mt7628[] = {
52 FUNC("refclk", 2, 6, 1),
53 FUNC("gpio", 1, 6, 1),
54 - FUNC("spi", 0, 6, 1),
55 + FUNC("spi cs1", 0, 6, 1),
58 static struct rt2880_pmx_func spis_grp_mt7628[] = {
59 @@ -185,28 +185,44 @@ static struct rt2880_pmx_func gpio_grp_mt7628[] = {
60 FUNC("gpio", 0, 11, 1),
63 -#define MT7628_GPIO_MODE_MASK 0x3
65 -#define MT7628_GPIO_MODE_PWM1 30
66 -#define MT7628_GPIO_MODE_PWM0 28
67 -#define MT7628_GPIO_MODE_UART2 26
68 -#define MT7628_GPIO_MODE_UART1 24
69 -#define MT7628_GPIO_MODE_I2C 20
70 -#define MT7628_GPIO_MODE_REFCLK 18
71 -#define MT7628_GPIO_MODE_PERST 16
72 -#define MT7628_GPIO_MODE_WDT 14
73 -#define MT7628_GPIO_MODE_SPI 12
74 -#define MT7628_GPIO_MODE_SDMODE 10
75 -#define MT7628_GPIO_MODE_UART0 8
76 -#define MT7628_GPIO_MODE_I2S 6
77 -#define MT7628_GPIO_MODE_CS1 4
78 -#define MT7628_GPIO_MODE_SPIS 2
79 -#define MT7628_GPIO_MODE_GPIO 0
80 +static struct rt2880_pmx_func wled_kn_grp_mt7628[] = {
81 + FUNC("rsvd", 3, 35, 1),
82 + FUNC("rsvd", 2, 35, 1),
83 + FUNC("gpio", 1, 35, 1),
84 + FUNC("wled_kn", 0, 35, 1),
87 +static struct rt2880_pmx_func wled_an_grp_mt7628[] = {
88 + FUNC("rsvd", 3, 35, 1),
89 + FUNC("rsvd", 2, 35, 1),
90 + FUNC("gpio", 1, 35, 1),
91 + FUNC("wled_an", 0, 35, 1),
94 +#define MT7628_GPIO_MODE_MASK 0x3
96 +#define MT7628_GPIO_MODE_WLED_KN 48
97 +#define MT7628_GPIO_MODE_WLED_AN 32
98 +#define MT7628_GPIO_MODE_PWM1 30
99 +#define MT7628_GPIO_MODE_PWM0 28
100 +#define MT7628_GPIO_MODE_UART2 26
101 +#define MT7628_GPIO_MODE_UART1 24
102 +#define MT7628_GPIO_MODE_I2C 20
103 +#define MT7628_GPIO_MODE_REFCLK 18
104 +#define MT7628_GPIO_MODE_PERST 16
105 +#define MT7628_GPIO_MODE_WDT 14
106 +#define MT7628_GPIO_MODE_SPI 12
107 +#define MT7628_GPIO_MODE_SDMODE 10
108 +#define MT7628_GPIO_MODE_UART0 8
109 +#define MT7628_GPIO_MODE_I2S 6
110 +#define MT7628_GPIO_MODE_CS1 4
111 +#define MT7628_GPIO_MODE_SPIS 2
112 +#define MT7628_GPIO_MODE_GPIO 0
114 static struct rt2880_pmx_group mt7628an_pinmux_data[] = {
115 GRP_G("pmw1", pwm1_grp_mt7628, MT7628_GPIO_MODE_MASK,
116 1, MT7628_GPIO_MODE_PWM1),
117 - GRP_G("pmw1", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK,
118 + GRP_G("pmw0", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK,
119 1, MT7628_GPIO_MODE_PWM0),
120 GRP_G("uart2", uart2_grp_mt7628, MT7628_GPIO_MODE_MASK,
121 1, MT7628_GPIO_MODE_UART2),
122 @@ -230,6 +246,10 @@ static struct rt2880_pmx_group mt7628an_pinmux_data[] = {
123 1, MT7628_GPIO_MODE_SPIS),
124 GRP_G("gpio", gpio_grp_mt7628, MT7628_GPIO_MODE_MASK,
125 1, MT7628_GPIO_MODE_GPIO),
126 + GRP_G("wled_an", wled_an_grp_mt7628, MT7628_GPIO_MODE_MASK,
127 + 1, MT7628_GPIO_MODE_WLED_AN),
128 + GRP_G("wled_kn", wled_kn_grp_mt7628, MT7628_GPIO_MODE_MASK,
129 + 1, MT7628_GPIO_MODE_WLED_KN),
133 @@ -542,7 +562,11 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
134 (rev & CHIP_REV_ECO_MASK));
136 cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0);
137 - dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
139 + if (ralink_soc == MT762X_SOC_MT7628AN)
140 + dram_type = ((cfg0&0x00000001) == 0x00000001)?SYSCFG0_DRAM_TYPE_DDR1_MT7628:SYSCFG0_DRAM_TYPE_DDR2_MT7628;
142 + dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
144 soc_info->mem_base = MT7620_DRAM_BASE;
145 if (mt762x_soc == MT762X_SOC_MT7628AN)