1 From 0eccf6e501337213d1de75dcf8f158d194ae0f77 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Sun, 7 Apr 2013 17:02:27 +0200
4 Subject: [PATCH 2/3] MIPS: ralink: add cpu-feature-overrides.h for
7 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
9 .../asm/mach-ralink/rt305x/cpu-feature-overrides.h | 56 ++++++++++++++++++++
10 arch/mips/ralink/Platform | 1 +
11 2 files changed, 57 insertions(+)
12 create mode 100644 arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
15 +++ b/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
18 + * Ralink RT305x specific CPU feature overrides
20 + * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
21 + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
23 + * This file was derived from: include/asm-mips/cpu-features.h
24 + * Copyright (C) 2003, 2004 Ralf Baechle
25 + * Copyright (C) 2004 Maciej W. Rozycki
27 + * This program is free software; you can redistribute it and/or modify it
28 + * under the terms of the GNU General Public License version 2 as published
29 + * by the Free Software Foundation.
32 +#ifndef _RT305X_CPU_FEATURE_OVERRIDES_H
33 +#define _RT305X_CPU_FEATURE_OVERRIDES_H
35 +#define cpu_has_tlb 1
36 +#define cpu_has_4kex 1
37 +#define cpu_has_3k_cache 0
38 +#define cpu_has_4k_cache 1
39 +#define cpu_has_tx39_cache 0
40 +#define cpu_has_sb1_cache 0
41 +#define cpu_has_fpu 0
42 +#define cpu_has_32fpr 0
43 +#define cpu_has_counter 1
44 +#define cpu_has_watch 1
45 +#define cpu_has_divec 1
47 +#define cpu_has_prefetch 1
48 +#define cpu_has_ejtag 1
49 +#define cpu_has_llsc 1
51 +#define cpu_has_mips16 1
52 +#define cpu_has_mdmx 0
53 +#define cpu_has_mips3d 0
54 +#define cpu_has_smartmips 0
56 +#define cpu_has_mips32r1 1
57 +#define cpu_has_mips32r2 1
58 +#define cpu_has_mips64r1 0
59 +#define cpu_has_mips64r2 0
61 +#define cpu_has_dsp 1
62 +#define cpu_has_mipsmt 0
64 +#define cpu_has_64bits 0
65 +#define cpu_has_64bit_zero_reg 0
66 +#define cpu_has_64bit_gp_regs 0
67 +#define cpu_has_64bit_addresses 0
69 +#define cpu_dcache_line_size() 32
70 +#define cpu_icache_line_size() 32
72 +#endif /* _RT305X_CPU_FEATURE_OVERRIDES_H */
73 --- a/arch/mips/ralink/Platform
74 +++ b/arch/mips/ralink/Platform
75 @@ -14,6 +14,7 @@ cflags-$(CONFIG_SOC_RT288X) += -I$(srctr
78 load-$(CONFIG_SOC_RT305X) += 0xffffffff80000000
79 +cflags-$(CONFIG_SOC_RT305X) += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt305x