1 From fe26f3e7d1329fc2a5ac14808dbecb7d324d0a41 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Wed, 27 Mar 2013 20:56:22 +0100
4 Subject: [PATCH 3/5] MIPS: ralink: process PCI pinmux group
6 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
8 arch/mips/ralink/pinmux.c | 14 +++++++++++++-
9 1 file changed, 13 insertions(+), 1 deletion(-)
11 --- a/arch/mips/ralink/pinmux.c
12 +++ b/arch/mips/ralink/pinmux.c
13 @@ -29,7 +29,7 @@ void ralink_pinmux(void)
15 struct device_node *np;
16 struct property *prop;
17 - const char *uart, *pin;
18 + const char *uart, *pci, *pin;
21 np = of_find_compatible_node(NULL, NULL, "ralink,rt3050-sysc");
22 @@ -76,5 +76,20 @@ void ralink_pinmux(void)
23 if (wdt && *wdt && rt_pinmux.wdt_reset)
24 rt_pinmux.wdt_reset();
28 + of_property_read_string(np, "ralink,pcimux", &pci);
31 + int m = ralink_mux_mask(pci, rt_pinmux.pci);
32 + mode &= ~(rt_pinmux.pci_mask << rt_pinmux.pci_shift);
34 + mode |= (m << rt_pinmux.pci_shift);
35 + pr_debug("pinmux: registered pcimux \"%s\"\n", pci);
37 + pr_debug("pinmux: registered pcimux \"gpio\"\n");
41 rt_sysc_w32(mode, SYSC_REG_GPIO_MODE);