1 From ac2614707be7ddceb0f0b623d55d200f28695d5f Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 25 Mar 2013 11:19:58 +0100
4 Subject: [PATCH 102/121] MIPS: ralink: add RT5350 sdram register defines
6 Add a few missing defines that are needed to make memory detection work on the
9 Signed-off-by: John Crispin <blogic@openwrt.org>
11 arch/mips/include/asm/mach-ralink/rt305x.h | 8 ++++++++
12 1 file changed, 8 insertions(+)
14 diff --git a/arch/mips/include/asm/mach-ralink/rt305x.h b/arch/mips/include/asm/mach-ralink/rt305x.h
15 index 7d344f2..4e62cef 100644
16 --- a/arch/mips/include/asm/mach-ralink/rt305x.h
17 +++ b/arch/mips/include/asm/mach-ralink/rt305x.h
18 @@ -97,6 +97,14 @@ static inline int soc_is_rt5350(void)
19 #define RT5350_SYSCFG0_CPUCLK_320 0x2
20 #define RT5350_SYSCFG0_CPUCLK_300 0x3
22 +#define RT5350_SYSCFG0_DRAM_SIZE_SHIFT 12
23 +#define RT5350_SYSCFG0_DRAM_SIZE_MASK 7
24 +#define RT5350_SYSCFG0_DRAM_SIZE_2M 0
25 +#define RT5350_SYSCFG0_DRAM_SIZE_8M 1
26 +#define RT5350_SYSCFG0_DRAM_SIZE_16M 2
27 +#define RT5350_SYSCFG0_DRAM_SIZE_32M 3
28 +#define RT5350_SYSCFG0_DRAM_SIZE_64M 4
30 /* multi function gpio pins */
31 #define RT305X_GPIO_I2C_SD 1
32 #define RT305X_GPIO_I2C_SCLK 2