[ramips] add patches for v3.8
[openwrt.git] / target / linux / ramips / patches-3.8 / 0014-MIPS-ralink-add-CPU-interrupt-controller-to-of_irq_i.patch
1 From d3d2b4200b5a42851365e903d101f8f0882eb9eb Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Thu, 31 Jan 2013 20:43:30 +0100
4 Subject: [PATCH 14/14] MIPS: ralink: add CPU interrupt controller to
5  of_irq_ids
6
7 Convert the ralink IRQ code to make use of the new MIPS IRQ controller OF
8 mappings.
9
10 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
11 Signed-off-by: John Crispin <blogic@openwrt.org>
12 Acked-by: David Daney <david.daney@cavium.com>
13 Patchwork: http://patchwork.linux-mips.org/patch/4900/
14 ---
15  arch/mips/ralink/dts/rt3050.dtsi |   10 ++++++++++
16  arch/mips/ralink/irq.c           |   10 +++++++---
17  2 files changed, 17 insertions(+), 3 deletions(-)
18
19 diff --git a/arch/mips/ralink/dts/rt3050.dtsi b/arch/mips/ralink/dts/rt3050.dtsi
20 index fd49daa..069d066 100644
21 --- a/arch/mips/ralink/dts/rt3050.dtsi
22 +++ b/arch/mips/ralink/dts/rt3050.dtsi
23 @@ -13,6 +13,13 @@
24                 bootargs = "console=ttyS0,57600 init=/init";
25         };
26  
27 +       cpuintc: cpuintc@0 {
28 +               #address-cells = <0>;
29 +               #interrupt-cells = <1>;
30 +               interrupt-controller;
31 +               compatible = "mti,cpu-interrupt-controller";
32 +       };
33 +
34         palmbus@10000000 {
35                 compatible = "palmbus";
36                 reg = <0x10000000 0x200000>;
37 @@ -37,6 +44,9 @@
38  
39                         interrupt-controller;
40                         #interrupt-cells = <1>;
41 +
42 +                       interrupt-parent = <&cpuintc>;
43 +                       interrupts = <2>;
44                 };
45  
46                 memc@300 {
47 diff --git a/arch/mips/ralink/irq.c b/arch/mips/ralink/irq.c
48 index e62c975..6d054c5 100644
49 --- a/arch/mips/ralink/irq.c
50 +++ b/arch/mips/ralink/irq.c
51 @@ -128,8 +128,11 @@ static int __init intc_of_init(struct device_node *node,
52  {
53         struct resource res;
54         struct irq_domain *domain;
55 +       int irq;
56  
57 -       mips_cpu_irq_init();
58 +       irq = irq_of_parse_and_map(node, 0);
59 +       if (!irq)
60 +               panic("Failed to get INTC IRQ");
61  
62         if (of_address_to_resource(node, 0, &res))
63                 panic("Failed to get intc memory range");
64 @@ -156,8 +159,8 @@ static int __init intc_of_init(struct device_node *node,
65  
66         rt_intc_w32(INTC_INT_GLOBAL, INTC_REG_ENABLE);
67  
68 -       irq_set_chained_handler(RALINK_CPU_IRQ_INTC, ralink_intc_irq_handler);
69 -       irq_set_handler_data(RALINK_CPU_IRQ_INTC, domain);
70 +       irq_set_chained_handler(irq, ralink_intc_irq_handler);
71 +       irq_set_handler_data(irq, domain);
72  
73         cp0_perfcount_irq = irq_create_mapping(domain, 9);
74  
75 @@ -165,6 +168,7 @@ static int __init intc_of_init(struct device_node *node,
76  }
77  
78  static struct of_device_id __initdata of_irq_ids[] = {
79 +       { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_intc_init },
80         { .compatible = "ralink,rt2880-intc", .data = intc_of_init },
81         {},
82  };
83 -- 
84 1.7.10.4
85