81d9feac9e4894463e7ac4a4021dc1a133974d0d
[openwrt.git] / target / linux / ramips / patches-3.8 / 0009-MIPS-ralink-adds-rt305x-devicetree.patch
1 From 8208a43c301d9164802dedeec7455dbdd70ca286 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Tue, 22 Jan 2013 20:19:33 +0100
4 Subject: [PATCH 09/79] MIPS: ralink: adds rt305x devicetree
5
6 This adds the devicetree file that describes the rt305x evaluation kit.
7
8 Signed-off-by: John Crispin <blogic@openwrt.org>
9 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
10 Patchwork: http://patchwork.linux-mips.org/patch/4898/
11 ---
12  arch/mips/ralink/dts/rt3050.dtsi     |   96 ++++++++++++++++++++++++++++++++++
13  arch/mips/ralink/dts/rt3052_eval.dts |   52 ++++++++++++++++++
14  2 files changed, 148 insertions(+)
15  create mode 100644 arch/mips/ralink/dts/rt3050.dtsi
16  create mode 100644 arch/mips/ralink/dts/rt3052_eval.dts
17
18 diff --git a/arch/mips/ralink/dts/rt3050.dtsi b/arch/mips/ralink/dts/rt3050.dtsi
19 new file mode 100644
20 index 0000000..fd49daa
21 --- /dev/null
22 +++ b/arch/mips/ralink/dts/rt3050.dtsi
23 @@ -0,0 +1,96 @@
24 +/ {
25 +       #address-cells = <1>;
26 +       #size-cells = <1>;
27 +       compatible = "ralink,rt3050-soc", "ralink,rt3052-soc";
28 +
29 +       cpus {
30 +               cpu@0 {
31 +                       compatible = "mips,mips24KEc";
32 +               };
33 +       };
34 +
35 +       chosen {
36 +               bootargs = "console=ttyS0,57600 init=/init";
37 +       };
38 +
39 +       palmbus@10000000 {
40 +               compatible = "palmbus";
41 +               reg = <0x10000000 0x200000>;
42 +                ranges = <0x0 0x10000000 0x1FFFFF>;
43 +
44 +               #address-cells = <1>;
45 +               #size-cells = <1>;
46 +
47 +               sysc@0 {
48 +                       compatible = "ralink,rt3052-sysc", "ralink,rt3050-sysc";
49 +                       reg = <0x0 0x100>;
50 +               };
51 +
52 +               timer@100 {
53 +                       compatible = "ralink,rt3052-wdt", "ralink,rt2880-wdt";
54 +                       reg = <0x100 0x100>;
55 +               };
56 +
57 +               intc: intc@200 {
58 +                       compatible = "ralink,rt3052-intc", "ralink,rt2880-intc";
59 +                       reg = <0x200 0x100>;
60 +
61 +                       interrupt-controller;
62 +                       #interrupt-cells = <1>;
63 +               };
64 +
65 +               memc@300 {
66 +                       compatible = "ralink,rt3052-memc", "ralink,rt3050-memc";
67 +                       reg = <0x300 0x100>;
68 +               };
69 +
70 +               gpio0: gpio@600 {
71 +                       compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
72 +                       reg = <0x600 0x34>;
73 +
74 +                       gpio-controller;
75 +                       #gpio-cells = <2>;
76 +
77 +                       ralink,ngpio = <24>;
78 +                       ralink,regs = [ 00 04 08 0c
79 +                                       20 24 28 2c
80 +                                       30 34 ];
81 +               };
82 +
83 +               gpio1: gpio@638 {
84 +                       compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
85 +                       reg = <0x638 0x24>;
86 +
87 +                       gpio-controller;
88 +                       #gpio-cells = <2>;
89 +
90 +                       ralink,ngpio = <16>;
91 +                       ralink,regs = [ 00 04 08 0c
92 +                                       10 14 18 1c
93 +                                       20 24 ];
94 +               };
95 +
96 +               gpio2: gpio@660 {
97 +                       compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
98 +                       reg = <0x660 0x24>;
99 +
100 +                       gpio-controller;
101 +                       #gpio-cells = <2>;
102 +
103 +                       ralink,ngpio = <12>;
104 +                       ralink,regs = [ 00 04 08 0c
105 +                                       10 14 18 1c
106 +                                       20 24 ];
107 +               };
108 +
109 +               uartlite@c00 {
110 +                       compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
111 +                       reg = <0xc00 0x100>;
112 +
113 +                       interrupt-parent = <&intc>;
114 +                       interrupts = <12>;
115 +
116 +                       reg-shift = <2>;
117 +               };
118 +       };
119 +};
120 diff --git a/arch/mips/ralink/dts/rt3052_eval.dts b/arch/mips/ralink/dts/rt3052_eval.dts
121 new file mode 100644
122 index 0000000..dc56e58
123 --- /dev/null
124 +++ b/arch/mips/ralink/dts/rt3052_eval.dts
125 @@ -0,0 +1,52 @@
126 +/dts-v1/;
127 +
128 +/include/ "rt3050.dtsi"
129 +
130 +/ {
131 +       #address-cells = <1>;
132 +       #size-cells = <1>;
133 +       compatible = "ralink,rt3052-eval-board", "ralink,rt3052-soc";
134 +       model = "Ralink RT3052 evaluation board";
135 +
136 +       memory@0 {
137 +               reg = <0x0 0x2000000>;
138 +       };
139 +
140 +       palmbus@10000000 {
141 +               sysc@0 {
142 +                       ralink,pinmux = "uartlite", "spi";
143 +                       ralink,uartmux = "gpio";
144 +                       ralink,wdtmux = <0>;
145 +               };
146 +       };
147 +
148 +       cfi@1f000000 {
149 +               compatible = "cfi-flash";
150 +               reg = <0x1f000000 0x800000>;
151 +
152 +               bank-width = <2>;
153 +               device-width = <2>;
154 +               #address-cells = <1>;
155 +               #size-cells = <1>;
156 +
157 +               partition@0 {
158 +                       label = "uboot";
159 +                       reg = <0x0 0x30000>;
160 +                       read-only;
161 +               };
162 +               partition@30000 {
163 +                       label = "uboot-env";
164 +                       reg = <0x30000 0x10000>;
165 +                       read-only;
166 +               };
167 +               partition@40000 {
168 +                       label = "calibration";
169 +                       reg = <0x40000 0x10000>;
170 +                       read-only;
171 +               };
172 +               partition@50000 {
173 +                       label = "linux";
174 +                       reg = <0x50000 0x7b0000>;
175 +               };
176 +       };
177 +};
178 -- 
179 1.7.10.4
180