f3d49694c29034ac166db2f217be9fd2b3da679b
[openwrt.git] / target / linux / ramips / patches-3.14 / 999-pci-reset.patch
1 Index: linux-3.14.18/arch/mips/ralink/reset.c
2 ===================================================================
3 --- linux-3.14.18.orig/arch/mips/ralink/reset.c 2014-11-23 00:32:23.268612766 +0100
4 +++ linux-3.14.18/arch/mips/ralink/reset.c      2014-11-23 02:55:41.492326840 +0100
5 @@ -11,6 +11,7 @@
6  #include <linux/pm.h>
7  #include <linux/io.h>
8  #include <linux/of.h>
9 +#include <linux/delay.h>
10  #include <linux/reset-controller.h>
11  
12  #include <asm/reboot.h>
13 @@ -18,8 +19,10 @@
14  #include <asm/mach-ralink/ralink_regs.h>
15  
16  /* Reset Control */
17 -#define SYSC_REG_RESET_CTRL     0x034
18 -#define RSTCTL_RESET_SYSTEM     BIT(0)
19 +#define SYSC_REG_RESET_CTRL    0x034
20 +
21 +#define RSTCTL_RESET_PCI       BIT(26)
22 +#define RSTCTL_RESET_SYSTEM    BIT(0)
23  
24  static int ralink_assert_device(struct reset_controller_dev *rcdev,
25                                 unsigned long id)
26 @@ -83,6 +86,11 @@
27  
28  static void ralink_restart(char *command)
29  {
30 +       if (IS_ENABLED(CONFIG_PCI)) {
31 +               rt_sysc_m32(0, RSTCTL_RESET_PCI, SYSC_REG_RESET_CTRL);
32 +               mdelay(50);
33 +       }
34 +
35         local_irq_disable();
36         rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
37         unreachable();