ralink: add proper reset of pci core
[15.05/openwrt.git] / target / linux / ramips / patches-3.14 / 999-pci-reset.patch
1 Index: linux-3.14.18/arch/mips/ralink/reset.c
2 ===================================================================
3 --- linux-3.14.18.orig/arch/mips/ralink/reset.c 2014-11-23 00:32:23.268612766 +0100
4 +++ linux-3.14.18/arch/mips/ralink/reset.c      2014-11-23 01:13:46.850117349 +0100
5 @@ -18,8 +18,10 @@
6  #include <asm/mach-ralink/ralink_regs.h>
7  
8  /* Reset Control */
9 -#define SYSC_REG_RESET_CTRL     0x034
10 -#define RSTCTL_RESET_SYSTEM     BIT(0)
11 +#define SYSC_REG_RESET_CTRL    0x034
12 +
13 +#define RSTCTL_RESET_PCI       BIT(26)
14 +#define RSTCTL_RESET_SYSTEM    BIT(0)
15  
16  static int ralink_assert_device(struct reset_controller_dev *rcdev,
17                                 unsigned long id)
18 @@ -83,6 +85,11 @@
19  
20  static void ralink_restart(char *command)
21  {
22 +       if (IS_ENABLED(CONFIG_PCI)) {
23 +               rt_sysc_m32(0, RSTCTL_RESET_PCI, SYSC_REG_RESET_CTRL);
24 +               mdelay(50);
25 +       }
26 +
27         local_irq_disable();
28         rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
29         unreachable();