2 * Ralink RT3662/RT3883 SoC specific setup
4 * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
6 * Parts of this file are based on Ralink's 2.6.21 BSP
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/init.h>
16 #include <linux/err.h>
17 #include <linux/clk.h>
19 #include <asm/mips_machine.h>
20 #include <asm/reboot.h>
23 #include <asm/mach-ralink/common.h>
24 #include <asm/mach-ralink/rt3883.h>
25 #include <asm/mach-ralink/rt3883_regs.h>
28 static void rt3883_restart(char *command)
30 rt3883_sysc_wr(RT3883_RSTCTRL_SYS, RT3883_SYSC_REG_RSTCTRL);
36 static void rt3883_halt(void)
43 unsigned int __cpuinit get_c0_compare_irq(void)
45 return CP0_LEGACY_COMPARE_IRQ;
48 void __init ramips_soc_setup(void)
52 rt3883_sysc_base = ioremap_nocache(RT3883_SYSC_BASE, PAGE_SIZE);
53 rt3883_memc_base = ioremap_nocache(RT3883_MEMC_BASE, PAGE_SIZE);
55 rt3883_detect_sys_type();
58 clk = clk_get(NULL, "cpu");
60 panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
62 printk(KERN_INFO "%s running at %lu.%02lu MHz\n", ramips_sys_type,
63 clk_get_rate(clk) / 1000000,
64 (clk_get_rate(clk) % 1000000) * 100 / 1000000);
66 _machine_restart = rt3883_restart;
67 _machine_halt = rt3883_halt;
68 pm_power_off = rt3883_halt;
70 clk = clk_get(NULL, "uart");
72 panic("unable to get UART clock, err=%ld", PTR_ERR(clk));
74 ramips_early_serial_setup(0, RT3883_UART0_BASE, clk_get_rate(clk),
75 RT3883_INTC_IRQ_UART0);
76 ramips_early_serial_setup(1, RT3883_UART1_BASE, clk_get_rate(clk),
77 RT3883_INTC_IRQ_UART1);
80 void __init plat_time_init(void)
84 clk = clk_get(NULL, "cpu");
86 panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
88 mips_hpt_frequency = clk_get_rate(clk) / 2;