target/linux/ramips/files/arch/mips/ralink/rt305x/irq.c

   1 /*
   2  *  Ralink RT305x SoC specific interrupt handling
   3  *
   4  *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/irq.h>
  15
  16 #include <asm/irq_cpu.h>
  17 #include <asm/mipsregs.h>
  18
  19 #include <asm/mach-ralink/rt305x.h>
  20 #include <asm/mach-ralink/rt305x_regs.h>
  21
  22 static void rt305x_intc_irq_dispatch(void)
  23 {
  24         u32 pending;
  25
  26         pending = rt305x_intc_rr(INTC_REG_STATUS0);
  27
  28         if (pending & RT305X_INTC_INT_TIMER0)
  29                 do_IRQ(RT305X_INTC_IRQ_TIMER0);
  30
  31         else if (pending & RT305X_INTC_INT_TIMER1)
  32                 do_IRQ(RT305X_INTC_IRQ_TIMER1);
  33
  34         else if (pending & RT305X_INTC_INT_UART0)
  35                 do_IRQ(RT305X_INTC_IRQ_UART0);
  36
  37         else if (pending & RT305X_INTC_INT_UART1)
  38                 do_IRQ(RT305X_INTC_IRQ_UART1);
  39
  40         /* TODO: handle PIO interrupts as well */
  41
  42         else
  43                 spurious_interrupt();
  44 }
  45
  46 static void rt305x_intc_irq_unmask(unsigned int irq)
  47 {
  48         irq -= RT305X_INTC_IRQ_BASE;
  49         rt305x_intc_wr((1 << irq), INTC_REG_ENABLE);
  50 }
  51
  52 static void rt305x_intc_irq_mask(unsigned int irq)
  53 {
  54         irq -= RT305X_INTC_IRQ_BASE;
  55         rt305x_intc_wr((1 << irq), INTC_REG_DISABLE);
  56 }
  57
  58 struct irq_chip rt305x_intc_irq_chip = {
  59         .name           = "RT305X INTC",
  60         .unmask         = rt305x_intc_irq_unmask,
  61         .mask           = rt305x_intc_irq_mask,
  62         .mask_ack       = rt305x_intc_irq_mask,
  63 };
  64
  65 static struct irqaction rt305x_intc_irqaction = {
  66         .handler        = no_action,
  67         .name           = "cascade [RT305X INTC]",
  68 };
  69
  70 static void __init rt305x_intc_irq_init(void)
  71 {
  72         int i;
  73
  74         /* disable all interrupts */
  75         rt305x_intc_wr(~0, INTC_REG_DISABLE);
  76
  77         /* route all INTC interrupts to MIPS HW0 interrupt */
  78         rt305x_intc_wr(0, INTC_REG_TYPE);
  79
  80         for (i = RT305X_INTC_IRQ_BASE;
  81              i < RT305X_INTC_IRQ_BASE + RT305X_INTC_IRQ_COUNT; i++) {
  82                 set_irq_chip_and_handler(i, &rt305x_intc_irq_chip,
  83                                          handle_level_irq);
  84         }
  85
  86         setup_irq(RT305X_CPU_IRQ_INTC, &rt305x_intc_irqaction);
  87
  88         /* enable interrupt masking */
  89         rt305x_intc_wr(RT305X_INTC_INT_GLOBAL, INTC_REG_ENABLE);
  90 }
  91
  92 asmlinkage void plat_irq_dispatch(void)
  93 {
  94         unsigned long pending;
  95
  96         pending = read_c0_status() & read_c0_cause() & ST0_IM;
  97
  98         if (pending & STATUSF_IP7)
  99                 do_IRQ(RT305X_CPU_IRQ_COUNTER);
 100
 101         else if (pending & STATUSF_IP5)
 102                 do_IRQ(RT305X_CPU_IRQ_FE);
 103
 104         else if (pending & STATUSF_IP6)
 105                 do_IRQ(RT305X_CPU_IRQ_WNIC);
 106
 107         else if (pending & STATUSF_IP2)
 108                 rt305x_intc_irq_dispatch();
 109
 110         else
 111                 spurious_interrupt();
 112 }
 113
 114 void __init arch_init_irq(void)
 115 {
 116         mips_cpu_irq_init();
 117         rt305x_intc_irq_init();
 118 }