4 compatible = "ralink,mtk7628an-soc";
8 compatible = "mips,mips24KEc";
13 bootargs = "console=ttyS0,57600";
18 #interrupt-cells = <1>;
20 compatible = "mti,cpu-interrupt-controller";
24 compatible = "palmbus";
25 reg = <0x10000000 0x200000>;
26 ranges = <0x0 0x10000000 0x1FFFFF>;
32 compatible = "ralink,mt7620a-sysc";
37 compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
40 resets = <&rstctrl 8>;
43 interrupt-parent = <&intc>;
48 compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
51 resets = <&rstctrl 9>;
55 #interrupt-cells = <1>;
57 interrupt-parent = <&cpuintc>;
60 ralink,intc-registers = <0x9c 0xa0
66 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
69 resets = <&rstctrl 20>;
72 interrupt-parent = <&intc>;
80 compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
83 interrupt-parent = <&intc>;
88 compatible = "mtk,mt7621-gpio-bank";
95 compatible = "mtk,mt7621-gpio-bank";
102 compatible = "mtk,mt7621-gpio-bank";
109 compatible = "mediatek,mt7628-i2c";
112 resets = <&rstctrl 16>;
115 #address-cells = <1>;
120 pinctrl-names = "default";
121 pinctrl-0 = <&i2c_pins>;
125 compatible = "ralink,mt7620a-i2s";
128 resets = <&rstctrl 17>;
131 interrupt-parent = <&intc>;
136 dma-names = "tx", "rx";
142 compatible = "ralink,mt7621-spi";
145 resets = <&rstctrl 18>;
148 #address-cells = <1>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&spi_pins>;
158 compatible = "ns16550a";
165 resets = <&rstctrl 12>;
166 reset-names = "uartl";
168 interrupt-parent = <&intc>;
171 pinctrl-names = "default";
172 pinctrl-0 = <&uart0_pins>;
176 compatible = "ns16550a";
183 resets = <&rstctrl 19>;
184 reset-names = "uart1";
186 interrupt-parent = <&intc>;
189 pinctrl-names = "default";
190 pinctrl-0 = <&uart1_pins>;
196 compatible = "ns16550a";
203 resets = <&rstctrl 20>;
204 reset-names = "uart2";
206 interrupt-parent = <&intc>;
209 pinctrl-names = "default";
210 pinctrl-0 = <&uart2_pins>;
216 compatible = "mediatek,mt7628-pwm";
217 reg = <0x5000 0x1000>;
219 resets = <&rstctrl 31>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
229 compatible = "ralink,mt7620a-pcm";
230 reg = <0x2000 0x800>;
232 resets = <&rstctrl 11>;
235 interrupt-parent = <&intc>;
242 compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
243 reg = <0x2800 0x800>;
245 resets = <&rstctrl 14>;
248 interrupt-parent = <&intc>;
252 #dma-channels = <16>;
253 #dma-requests = <16>;
260 compatible = "ralink,rt2880-pinmux";
261 pinctrl-names = "default";
262 pinctrl-0 = <&state_default>;
264 state_default: pinctrl0 {
269 ralink,group = "spi";
270 ralink,function = "spi";
274 spi_cs1_pins: spi_cs1 {
276 ralink,group = "spi cs1";
277 ralink,function = "spi cs1";
283 ralink,group = "i2c";
284 ralink,function = "i2c";
288 uart0_pins: uartlite {
290 ralink,group = "uart0";
291 ralink,function = "uart0";
297 ralink,group = "uart1";
298 ralink,function = "uart1";
304 ralink,group = "uart2";
305 ralink,function = "uart2";
311 ralink,group = "sdmode";
312 ralink,function = "sdxc";
318 ralink,group = "pwm0";
319 ralink,function = "pwm0";
325 ralink,group = "pwm1";
326 ralink,function = "pwm1";
332 ralink,group = "i2s";
333 ralink,function = "pcm";
339 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
344 compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
347 resets = <&rstctrl 22>;
348 reset-names = "host";
352 compatible = "ralink,mt7620-sdhci";
353 reg = <0x10130000 4000>;
355 interrupt-parent = <&intc>;
358 pinctrl-names = "default";
359 pinctrl-0 = <&sdxc_pins>;
365 compatible = "ralink,rt3xxx-ehci";
366 reg = <0x101c0000 0x1000>;
371 interrupt-parent = <&intc>;
376 compatible = "ralink,rt3xxx-ohci";
377 reg = <0x101c1000 0x1000>;
382 interrupt-parent = <&intc>;
387 compatible = "ralink,rt5350-eth";
388 reg = <0x10100000 10000>;
390 interrupt-parent = <&cpuintc>;
393 resets = <&rstctrl 21 &rstctrl 23>;
394 reset-names = "fe", "esw";
398 compatible = "ralink,rt3050-esw";
399 reg = <0x10110000 8000>;
401 resets = <&rstctrl 23>;
404 interrupt-parent = <&intc>;
409 compatible = "mediatek,mt7620-pci";
410 reg = <0x10140000 0x100
413 #address-cells = <3>;
416 resets = <&rstctrl 26>;
417 reset-names = "pcie0";
419 interrupt-parent = <&cpuintc>;
428 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
429 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
433 reg = <0x0000 0 0 0 0>;
435 #address-cells = <3>;