target/linux/ramips/dts/mt7628an.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "ralink,mtk7628an-soc";
   5
   6         cpus {
   7                 cpu@0 {
   8                         compatible = "mips,mips24KEc";
   9                 };
  10         };
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,57600";
  14         };
  15
  16         cpuintc: cpuintc@0 {
  17                 compatible = "mti,cpu-interrupt-controller";
  18                 interrupt-controller;
  19                 #interrupt-cells = <1>;
  20         };
  21
  22         palmbus@10000000 {
  23                 compatible = "palmbus";
  24                 reg = <0x10000000 0x200000>;
  25                 ranges = <0x0 0x10000000 0x1FFFFF>;
  26
  27                 #address-cells = <1>;
  28                 #size-cells = <1>;
  29
  30                 sysc@0 {
  31                         compatible = "ralink,mt7620a-sysc";
  32                         reg = <0x0 0x100>;
  33                 };
  34
  35                 watchdog@120 {
  36                         compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
  37                         reg = <0x120 0x10>;
  38
  39                         resets = <&rstctrl 8>;
  40                         reset-names = "wdt";
  41
  42                         interrupt-parent = <&intc>;
  43                         interrupts = <24>;
  44                 };
  45
  46                 intc: intc@200 {
  47                         compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
  48                         reg = <0x200 0x100>;
  49
  50                         resets = <&rstctrl 9>;
  51                         reset-names = "intc";
  52
  53                         interrupt-controller;
  54                         #interrupt-cells = <1>;
  55
  56                         interrupt-parent = <&cpuintc>;
  57                         interrupts = <2>;
  58
  59                         ralink,intc-registers = <0x9c 0xa0
  60                                                  0x6c 0xa4
  61                                                  0x80 0x78>;
  62                 };
  63
  64                 memc@300 {
  65                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  66                         reg = <0x300 0x100>;
  67
  68                         resets = <&rstctrl 20>;
  69                         reset-names = "mc";
  70
  71                         interrupt-parent = <&intc>;
  72                         interrupts = <3>;
  73                 };
  74
  75                 gpio@600 {
  76                         #address-cells = <1>;
  77                         #size-cells = <0>;
  78
  79                         compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
  80                         reg = <0x600 0x100>;
  81
  82                         interrupt-parent = <&intc>;
  83                         interrupts = <6>;
  84
  85                         gpio0: bank@0 {
  86                                 reg = <0>;
  87                                 compatible = "mtk,mt7621-gpio-bank";
  88                                 gpio-controller;
  89                                 #gpio-cells = <2>;
  90                         };
  91
  92                         gpio1: bank@1 {
  93                                 reg = <1>;
  94                                 compatible = "mtk,mt7621-gpio-bank";
  95                                 gpio-controller;
  96                                 #gpio-cells = <2>;
  97                         };
  98
  99                         gpio2: bank@2 {
 100                                 reg = <2>;
 101                                 compatible = "mtk,mt7621-gpio-bank";
 102                                 gpio-controller;
 103                                 #gpio-cells = <2>;
 104                         };
 105                 };
 106
 107                 i2c@900 {
 108                         compatible = "mediatek,mt7628-i2c";
 109                         reg = <0x900 0x100>;
 110
 111                         resets = <&rstctrl 16>;
 112                         reset-names = "i2c";
 113
 114                         #address-cells = <1>;
 115                         #size-cells = <0>;
 116
 117                         status = "disabled";
 118
 119                         pinctrl-names = "default";
 120                         pinctrl-0 = <&i2c_pins>;
 121                 };
 122
 123                 i2s@a00 {
 124                         compatible = "ralink,mt7620a-i2s";
 125                         reg = <0xa00 0x100>;
 126
 127                         resets = <&rstctrl 17>;
 128                         reset-names = "i2s";
 129
 130                         interrupt-parent = <&intc>;
 131                         interrupts = <10>;
 132
 133                         dmas = <&gdma 2>,
 134                                 <&gdma 3>;
 135                         dma-names = "tx", "rx";
 136
 137                         status = "disabled";
 138                 };
 139
 140                 spi@b00 {
 141                         compatible = "ralink,mt7621-spi";
 142                         reg = <0xb00 0x100>;
 143
 144                         resets = <&rstctrl 18>;
 145                         reset-names = "spi";
 146
 147                         #address-cells = <1>;
 148                         #size-cells = <1>;
 149
 150                         pinctrl-names = "default";
 151                         pinctrl-0 = <&spi_pins>;
 152
 153                         status = "disabled";
 154                 };
 155
 156                 uartlite@c00 {
 157                         compatible = "ns16550a";
 158                         reg = <0xc00 0x100>;
 159
 160                         reg-shift = <2>;
 161                         reg-io-width = <4>;
 162                         no-loopback-test;
 163
 164                         resets = <&rstctrl 12>;
 165                         reset-names = "uartl";
 166
 167                         interrupt-parent = <&intc>;
 168                         interrupts = <20>;
 169
 170                         pinctrl-names = "default";
 171                         pinctrl-0 = <&uart0_pins>;
 172                 };
 173
 174                 uart1@d00 {
 175                         compatible = "ns16550a";
 176                         reg = <0xd00 0x100>;
 177
 178                         reg-shift = <2>;
 179                         reg-io-width = <4>;
 180                         no-loopback-test;
 181
 182                         resets = <&rstctrl 19>;
 183                         reset-names = "uart1";
 184
 185                         interrupt-parent = <&intc>;
 186                         interrupts = <21>;
 187
 188                         pinctrl-names = "default";
 189                         pinctrl-0 = <&uart1_pins>;
 190
 191                         status = "disabled";
 192                 };
 193
 194                 uart2@e00 {
 195                         compatible = "ns16550a";
 196                         reg = <0xe00 0x100>;
 197
 198                         reg-shift = <2>;
 199                         reg-io-width = <4>;
 200                         no-loopback-test;
 201
 202                         resets = <&rstctrl 20>;
 203                         reset-names = "uart2";
 204
 205                         interrupt-parent = <&intc>;
 206                         interrupts = <22>;
 207
 208                         pinctrl-names = "default";
 209                         pinctrl-0 = <&uart2_pins>;
 210
 211                         status = "disabled";
 212                 };
 213
 214                 pwm@5000 {
 215                         compatible = "mediatek,mt7628-pwm";
 216                         reg = <0x5000 0x1000>;
 217
 218                         resets = <&rstctrl 31>;
 219                         reset-names = "pwm";
 220
 221                         pinctrl-names = "default";
 222                         pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
 223
 224                         status = "disabled";
 225                 };
 226
 227                 pcm@2000 {
 228                         compatible = "ralink,mt7620a-pcm";
 229                         reg = <0x2000 0x800>;
 230
 231                         resets = <&rstctrl 11>;
 232                         reset-names = "pcm";
 233
 234                         interrupt-parent = <&intc>;
 235                         interrupts = <4>;
 236
 237                         status = "disabled";
 238                 };
 239
 240                 gdma: gdma@2800 {
 241                         compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
 242                         reg = <0x2800 0x800>;
 243
 244                         resets = <&rstctrl 14>;
 245                         reset-names = "dma";
 246
 247                         interrupt-parent = <&intc>;
 248                         interrupts = <7>;
 249
 250                         #dma-cells = <1>;
 251                         #dma-channels = <16>;
 252                         #dma-requests = <16>;
 253
 254                         status = "disabled";
 255                 };
 256         };
 257
 258         pinctrl {
 259                 compatible = "ralink,rt2880-pinmux";
 260                 pinctrl-names = "default";
 261                 pinctrl-0 = <&state_default>;
 262                 state_default: pinctrl0 {
 263                 };
 264                 spi_pins: spi {
 265                         spi {
 266                                 ralink,group = "spi";
 267                                 ralink,function = "spi";
 268                         };
 269                 };
 270
 271                 spi_cs1_pins: spi_cs1 {
 272                         spi_cs1 {
 273                                 ralink,group = "spi cs1";
 274                                 ralink,function = "spi cs1";
 275                         };
 276                 };
 277
 278                 i2c_pins: i2c {
 279                         i2c {
 280                                 ralink,group = "i2c";
 281                                 ralink,function = "i2c";
 282                         };
 283                 };
 284
 285                 uart0_pins: uartlite {
 286                         uartlite {
 287                                 ralink,group = "uart0";
 288                                 ralink,function = "uart0";
 289                         };
 290                 };
 291
 292                 uart1_pins: uart1 {
 293                         uart1 {
 294                                 ralink,group = "uart1";
 295                                 ralink,function = "uart1";
 296                         };
 297                 };
 298
 299                 uart2_pins: uart2 {
 300                         uart2 {
 301                                 ralink,group = "uart2";
 302                                 ralink,function = "uart2";
 303                         };
 304                 };
 305
 306                 sdxc_pins: sdxc {
 307                         sdxc {
 308                                 ralink,group = "sdmode";
 309                                 ralink,function = "sdxc";
 310                         };
 311                 };
 312
 313                 pwm0_pins: pwm0 {
 314                         pwm0 {
 315                                 ralink,group = "pwm0";
 316                                 ralink,function = "pwm0";
 317                         };
 318                 };
 319
 320                 pwm1_pins: pwm1 {
 321                         pwm1 {
 322                                 ralink,group = "pwm1";
 323                                 ralink,function = "pwm1";
 324                         };
 325                 };
 326
 327                 pcm_i2s_pins: i2s {
 328                         i2s {
 329                                 ralink,group = "i2s";
 330                                 ralink,function = "pcm";
 331                         };
 332                 };
 333         };
 334
 335         rstctrl: rstctrl {
 336                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 337                 #reset-cells = <1>;
 338         };
 339
 340         usbphy: usbphy {
 341                 compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
 342                 #phy-cells = <1>;
 343
 344                 resets = <&rstctrl 22>;
 345                 reset-names = "host";
 346         };
 347
 348         sdhci@10130000 {
 349                 compatible = "ralink,mt7620-sdhci";
 350                 reg = <0x10130000 4000>;
 351
 352                 interrupt-parent = <&intc>;
 353                 interrupts = <14>;
 354
 355                 pinctrl-names = "default";
 356                 pinctrl-0 = <&sdxc_pins>;
 357
 358                 status = "disabled";
 359         };
 360
 361         ehci@101c0000 {
 362                 compatible = "ralink,rt3xxx-ehci";
 363                 reg = <0x101c0000 0x1000>;
 364
 365                 phys = <&usbphy 1>;
 366                 phy-names = "usb";
 367
 368                 interrupt-parent = <&intc>;
 369                 interrupts = <18>;
 370         };
 371
 372         ohci@101c1000 {
 373                 compatible = "ralink,rt3xxx-ohci";
 374                 reg = <0x101c1000 0x1000>;
 375
 376                 phys = <&usbphy 1>;
 377                 phy-names = "usb";
 378
 379                 interrupt-parent = <&intc>;
 380                 interrupts = <18>;
 381         };
 382
 383         ethernet@10100000 {
 384                 compatible = "ralink,rt5350-eth";
 385                 reg = <0x10100000 10000>;
 386
 387                 interrupt-parent = <&cpuintc>;
 388                 interrupts = <5>;
 389
 390                 resets = <&rstctrl 21 &rstctrl 23>;
 391                 reset-names = "fe", "esw";
 392         };
 393
 394         esw@10110000 {
 395                 compatible = "ralink,rt3050-esw";
 396                 reg = <0x10110000 8000>;
 397
 398                 resets = <&rstctrl 23>;
 399                 reset-names = "esw";
 400
 401                 interrupt-parent = <&intc>;
 402                 interrupts = <17>;
 403         };
 404
 405         pcie@10140000 {
 406                 compatible = "mediatek,mt7620-pci";
 407                 reg = <0x10140000 0x100
 408                         0x10142000 0x100>;
 409
 410                 #address-cells = <3>;
 411                 #size-cells = <2>;
 412
 413                 resets = <&rstctrl 26>;
 414                 reset-names = "pcie0";
 415
 416                 interrupt-parent = <&cpuintc>;
 417                 interrupts = <4>;
 418
 419                 status = "disabled";
 420
 421                 device_type = "pci";
 422
 423                 bus-range = <0 255>;
 424                 ranges = <
 425                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 426                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 427                 >;
 428
 429                 pcie-bridge {
 430                         reg = <0x0000 0 0 0 0>;
 431
 432                         #address-cells = <3>;
 433                         #size-cells = <2>;
 434
 435                         device_type = "pci";
 436                 };
 437         };
 438
 439 };