4 compatible = "ralink,mtk7628an-soc";
8 compatible = "mips,mips24KEc";
13 bootargs = "console=ttyS0,57600";
18 #interrupt-cells = <1>;
20 compatible = "mti,cpu-interrupt-controller";
24 compatible = "palmbus";
25 reg = <0x10000000 0x200000>;
26 ranges = <0x0 0x10000000 0x1FFFFF>;
32 compatible = "ralink,mt7620a-sysc";
37 compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
40 resets = <&rstctrl 8>;
43 interrupt-parent = <&intc>;
48 compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
51 resets = <&rstctrl 9>;
55 #interrupt-cells = <1>;
57 interrupt-parent = <&cpuintc>;
60 ralink,intc-registers = <0x9c 0xa0
66 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
69 resets = <&rstctrl 20>;
72 interrupt-parent = <&intc>;
80 compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
85 compatible = "mtk,mt7621-gpio-bank";
92 compatible = "mtk,mt7621-gpio-bank";
99 compatible = "mtk,mt7621-gpio-bank";
106 compatible = "ralink,mt7621-spi";
109 resets = <&rstctrl 18>;
112 #address-cells = <1>;
115 pinctrl-names = "default";
116 pinctrl-0 = <&spi_pins>;
122 compatible = "ns16550a";
129 resets = <&rstctrl 12>;
130 reset-names = "uartl";
132 interrupt-parent = <&intc>;
135 pinctrl-names = "default";
136 pinctrl-0 = <&uart0_pins>;
141 compatible = "ralink,rt2880-pinmux";
142 pinctrl-names = "default";
143 pinctrl-0 = <&state_default>;
144 state_default: pinctrl0 {
148 ralink,group = "spi";
149 ralink,function = "spi";
152 uart0_pins: uartlite {
154 ralink,group = "uart0";
155 ralink,function = "uart";
161 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
166 compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
169 resets = <&rstctrl 22>;
170 reset-names = "host";
174 compatible = "ralink,mt7620-sdhci";
175 reg = <0x10130000 4000>;
177 interrupt-parent = <&intc>;
184 compatible = "ralink,rt3xxx-ehci";
185 reg = <0x101c0000 0x1000>;
190 interrupt-parent = <&intc>;
195 compatible = "ralink,rt3xxx-ohci";
196 reg = <0x101c1000 0x1000>;
201 interrupt-parent = <&intc>;
206 compatible = "ralink,rt5350-eth";
207 reg = <0x10100000 10000>;
209 interrupt-parent = <&cpuintc>;
212 resets = <&rstctrl 21 &rstctrl 23>;
213 reset-names = "fe", "esw";
217 compatible = "ralink,rt3050-esw";
218 reg = <0x10110000 8000>;
220 resets = <&rstctrl 23>;
223 interrupt-parent = <&intc>;
228 compatible = "mediatek,mt7620-pci";
229 reg = <0x10140000 0x100
232 #address-cells = <3>;
235 resets = <&rstctrl 26>;
236 reset-names = "pcie0";
238 interrupt-parent = <&cpuintc>;
247 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
248 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
252 reg = <0x0000 0 0 0 0>;
254 #address-cells = <3>;