1 From ac825c0dd7370ae1b9a1a4346f895728e09d9cc7 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 1 Jul 2015 07:58:44 +0200
4 Subject: [PATCH 70/76] clk: mediatek: Export CPU mux clocks for CPU frequency
7 This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
8 for intermediate clock source switching.
12 - Fix some issues of v2
15 - Remove use of .determine_rate callback
17 Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
19 drivers/clk/mediatek/Makefile | 2 +-
20 drivers/clk/mediatek/clk-cpumux.c | 119 +++++++++++++++++++++++++++++++++++++
21 drivers/clk/mediatek/clk-cpumux.h | 30 ++++++++++
22 3 files changed, 150 insertions(+), 1 deletion(-)
23 create mode 100644 drivers/clk/mediatek/clk-cpumux.c
24 create mode 100644 drivers/clk/mediatek/clk-cpumux.h
26 diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
27 index 19a3763..fe07e26 100644
28 --- a/drivers/clk/mediatek/Makefile
29 +++ b/drivers/clk/mediatek/Makefile
31 -obj-y += clk-mtk.o clk-pll.o clk-gate.o
32 +obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-cpumux.o
33 obj-$(CONFIG_RESET_CONTROLLER) += reset.o
36 diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c
38 index 0000000..593df45
40 +++ b/drivers/clk/mediatek/clk-cpumux.c
43 + * Copyright (c) 2015 Linaro Ltd.
44 + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
46 + * This program is free software; you can redistribute it and/or modify
47 + * it under the terms of the GNU General Public License version 2 as
48 + * published by the Free Software Foundation.
50 + * This program is distributed in the hope that it will be useful,
51 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
52 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
53 + * GNU General Public License for more details.
56 +#include <linux/clk-provider.h>
57 +#include <linux/mfd/syscon.h>
58 +#include <linux/slab.h>
61 +#include "clk-cpumux.h"
63 +static inline struct mtk_clk_cpumux *to_clk_mux(struct clk_hw *_hw)
65 + return container_of(_hw, struct mtk_clk_cpumux, hw);
68 +static u8 clk_cpumux_get_parent(struct clk_hw *hw)
70 + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
71 + int num_parents = __clk_get_num_parents(hw->clk);
74 + regmap_read(mux->regmap, mux->reg, &val);
79 + if (val >= num_parents)
85 +static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index)
87 + struct mtk_clk_cpumux *mux = to_clk_mux(hw);
90 + val = index << mux->shift;
91 + mask = mux->mask << mux->shift;
93 + return regmap_update_bits(mux->regmap, mux->reg, mask, val);
96 +static const struct clk_ops clk_cpumux_ops = {
97 + .get_parent = clk_cpumux_get_parent,
98 + .set_parent = clk_cpumux_set_parent,
101 +static struct clk *mtk_clk_register_cpumux(const struct mtk_composite *mux,
102 + struct regmap *regmap)
104 + struct mtk_clk_cpumux *cpumux;
106 + struct clk_init_data init;
108 + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
110 + return ERR_PTR(-ENOMEM);
112 + init.name = mux->name;
113 + init.ops = &clk_cpumux_ops;
114 + init.parent_names = mux->parent_names;
115 + init.num_parents = mux->num_parents;
116 + init.flags = mux->flags;
118 + cpumux->reg = mux->mux_reg;
119 + cpumux->shift = mux->mux_shift;
120 + cpumux->mask = BIT(mux->mux_width) - 1;
121 + cpumux->regmap = regmap;
122 + cpumux->hw.init = &init;
124 + clk = clk_register(NULL, &cpumux->hw);
131 +int mtk_clk_register_cpumuxes(struct device_node *node,
132 + const struct mtk_composite *clks, int num,
133 + struct clk_onecell_data *clk_data)
137 + struct regmap *regmap;
139 + regmap = syscon_node_to_regmap(node);
140 + if (IS_ERR(regmap)) {
141 + pr_err("Cannot find regmap for %s: %d\n", node->full_name,
143 + return PTR_ERR(regmap);
146 + for (i = 0; i < num; i++) {
147 + const struct mtk_composite *mux = &clks[i];
149 + clk = mtk_clk_register_cpumux(mux, regmap);
151 + pr_err("Failed to register clk %s: %ld\n",
152 + mux->name, PTR_ERR(clk));
156 + clk_data->clks[mux->id] = clk;
161 diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h
163 index 0000000..dddaad5
165 +++ b/drivers/clk/mediatek/clk-cpumux.h
168 + * Copyright (c) 2015 Linaro Ltd.
169 + * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
171 + * This program is free software; you can redistribute it and/or modify
172 + * it under the terms of the GNU General Public License version 2 as
173 + * published by the Free Software Foundation.
175 + * This program is distributed in the hope that it will be useful,
176 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
177 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
178 + * GNU General Public License for more details.
181 +#ifndef __DRV_CLK_CPUMUX_H
182 +#define __DRV_CLK_CPUMUX_H
184 +struct mtk_clk_cpumux {
186 + struct regmap *regmap;
192 +int mtk_clk_register_cpumuxes(struct device_node *node,
193 + const struct mtk_composite *clks, int num,
194 + struct clk_onecell_data *clk_data);
196 +#endif /* __DRV_CLK_CPUMUX_H */