target/linux/lantiq/patches-3.7/0302-wifi-eep.patch

   1 --- a/arch/mips/lantiq/xway/Makefile
   2 +++ b/arch/mips/lantiq/xway/Makefile
   3 @@ -1,3 +1,6 @@
   4  obj-y := prom.o sysctrl.o clk.o reset.o dma.o timer.o dcdc.o
   5
   6 +obj-y += eth_mac.o
   7 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
   8 +
   9  obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
  10 --- /dev/null
  11 +++ b/arch/mips/lantiq/xway/ath_eep.c
  12 @@ -0,0 +1,206 @@
  13 +/*
  14 + *  Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
  15 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
  16 + *  Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
  17 + *  Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
  18 + *
  19 + *  This program is free software; you can redistribute it and/or modify it
  20 + *  under the terms of the GNU General Public License version 2 as published
  21 + *  by the Free Software Foundation.
  22 + */
  23 +
  24 +#include <linux/init.h>
  25 +#include <linux/module.h>
  26 +#include <linux/platform_device.h>
  27 +#include <linux/etherdevice.h>
  28 +#include <linux/ath5k_platform.h>
  29 +#include <linux/ath9k_platform.h>
  30 +#include <linux/pci.h>
  31 +#include <pci-ath-fixup.h>
  32 +
  33 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
  34 +struct ath5k_platform_data ath5k_pdata;
  35 +struct ath9k_platform_data ath9k_pdata = {
  36 +       .led_pin = -1,
  37 +};
  38 +static u16 ath5k_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS];
  39 +static u8 athxk_eeprom_mac[6];
  40 +
  41 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
  42 +{
  43 +       dev->dev.platform_data = &ath9k_pdata;
  44 +       return 0;
  45 +}
  46 +
  47 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
  48 +{
  49 +       struct device_node *np = pdev->dev.of_node;
  50 +       struct resource *eep_res, *mac_res;
  51 +       void __iomem *eep, *mac;
  52 +       int mac_offset;
  53 +       u32 mac_inc = 0, pci_slot = 0;
  54 +       int i;
  55 +       u16 *eepdata, sum, el;
  56 +
  57 +       eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  58 +       mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  59 +
  60 +       if (!eep_res) {
  61 +               dev_err(&pdev->dev, "failed to load eeprom address\n");
  62 +               return -ENODEV;
  63 +       }
  64 +       if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS) {
  65 +               dev_err(&pdev->dev, "eeprom has an invalid size\n");
  66 +               return -EINVAL;
  67 +       }
  68 +
  69 +       eep = ioremap(eep_res->start, resource_size(eep_res));
  70 +       memcpy_fromio(ath9k_pdata.eeprom_data, eep, ATH9K_PLAT_EEP_MAX_WORDS);
  71 +
  72 +       if (of_find_property(np, "ath,eep-swap", NULL)) {
  73 +               ath9k_pdata.endian_check = true;
  74 +
  75 +               dev_info(&pdev->dev, "endian check enabled.\n");
  76 +       }
  77 +
  78 +       if (of_find_property(np, "ath,eep-csum", NULL)) {
  79 +               sum = ath9k_pdata.eeprom_data[0x200>>1];
  80 +               el = sum / sizeof(u16) - 2;  /* skip length and (old) checksum */
  81 +               eepdata = (u16 *) (&ath9k_pdata.eeprom_data[0x204>>1]); /* after checksum */
  82 +               for (i = 0; i < el; i++)
  83 +                       sum ^= *eepdata++;
  84 +               sum ^= 0xffff;
  85 +               ath9k_pdata.eeprom_data[0x202>>1] = sum;
  86 +
  87 +               dev_info(&pdev->dev, "checksum fixed.\n");
  88 +       }
  89 +
  90 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
  91 +               memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data, 6);
  92 +       } else if (mac_res) {
  93 +               if (resource_size(mac_res) != 6) {
  94 +                       dev_err(&pdev->dev, "mac has an invalid size\n");
  95 +                       return -EINVAL;
  96 +               }
  97 +               mac = ioremap(mac_res->start, resource_size(mac_res));
  98 +               memcpy_fromio(athxk_eeprom_mac, mac, 6);
  99 +       } else {
 100 +               dev_warn(&pdev->dev, "using random mac\n");
 101 +               random_ether_addr(athxk_eeprom_mac);
 102 +       }
 103 +
 104 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 105 +               athxk_eeprom_mac[5] += mac_inc;
 106 +
 107 +       ath9k_pdata.macaddr = athxk_eeprom_mac;
 108 +       ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
 109 +
 110 +       if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
 111 +               ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
 112 +
 113 +               dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
 114 +       }
 115 +
 116 +       dev_info(&pdev->dev, "loaded ath9k eeprom\n");
 117 +
 118 +       return 0;
 119 +}
 120 +
 121 +static struct of_device_id ath9k_eeprom_ids[] = {
 122 +       { .compatible = "ath9k,eeprom" },
 123 +       { }
 124 +};
 125 +
 126 +static struct platform_driver ath9k_eeprom_driver = {
 127 +       .driver         = {
 128 +               .name           = "ath9k,eeprom",
 129 +               .owner  = THIS_MODULE,
 130 +               .of_match_table = of_match_ptr(ath9k_eeprom_ids),
 131 +       },
 132 +};
 133 +
 134 +static int __init of_ath9k_eeprom_init(void)
 135 +{
 136 +       return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 137 +}
 138 +arch_initcall(of_ath9k_eeprom_init);
 139 +
 140 +
 141 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
 142 +{
 143 +       dev->dev.platform_data = &ath5k_pdata;
 144 +       return 0;
 145 +}
 146 +
 147 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
 148 +{
 149 +       struct device_node *np = pdev->dev.of_node;
 150 +       struct resource *eep_res, *mac_res;
 151 +       void __iomem *eep, *mac;
 152 +       int mac_offset;
 153 +       u32 mac_inc = 0;
 154 +       int i;
 155 +
 156 +       eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 157 +       mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 158 +
 159 +       if (!eep_res) {
 160 +               dev_err(&pdev->dev, "failed to load eeprom address\n");
 161 +               return -ENODEV;
 162 +       }
 163 +       if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS) {
 164 +               dev_err(&pdev->dev, "eeprom has an invalid size\n");
 165 +               return -EINVAL;
 166 +       }
 167 +
 168 +       eep = ioremap(eep_res->start, resource_size(eep_res));
 169 +       memcpy_fromio(ath5k_eeprom_data, eep, ATH5K_PLAT_EEP_MAX_WORDS);
 170 +
 171 +       if (of_find_property(np, "ath,eep-swap", NULL))
 172 +               for (i = 0; i < (ATH5K_PLAT_EEP_MAX_WORDS >> 1); i++)
 173 +                               ath5k_eeprom_data[i] = swab16(ath5k_eeprom_data[i]);
 174 +
 175 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 176 +               memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_eeprom_data, 6);
 177 +       } else if (mac_res) {
 178 +               if (resource_size(mac_res) != 6) {
 179 +                       dev_err(&pdev->dev, "mac has an invalid size\n");
 180 +                       return -EINVAL;
 181 +               }
 182 +               mac = ioremap(mac_res->start, resource_size(mac_res));
 183 +               memcpy_fromio(athxk_eeprom_mac, mac, 6);
 184 +       } else {
 185 +               dev_warn(&pdev->dev, "using random mac\n");
 186 +               random_ether_addr(athxk_eeprom_mac);
 187 +       }
 188 +
 189 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 190 +               athxk_eeprom_mac[5] += mac_inc;
 191 +
 192 +       ath5k_pdata.eeprom_data = ath5k_eeprom_data;
 193 +       ath5k_pdata.macaddr = athxk_eeprom_mac;
 194 +       ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
 195 +
 196 +       dev_info(&pdev->dev, "loaded ath5k eeprom\n");
 197 +
 198 +       return 0;
 199 +}
 200 +
 201 +static struct of_device_id ath5k_eeprom_ids[] = {
 202 +       { .compatible = "ath5k,eeprom" },
 203 +       { }
 204 +};
 205 +
 206 +static struct platform_driver ath5k_eeprom_driver = {
 207 +       .driver         = {
 208 +               .name           = "ath5k,eeprom",
 209 +               .owner  = THIS_MODULE,
 210 +               .of_match_table = of_match_ptr(ath5k_eeprom_ids),
 211 +       },
 212 +};
 213 +
 214 +static int __init of_ath5k_eeprom_init(void)
 215 +{
 216 +       return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
 217 +}
 218 +device_initcall(of_ath5k_eeprom_init);
 219 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
 220 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
 221 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev,
 222  extern void ltq_pmu_enable(unsigned int module);
 223  extern void ltq_pmu_disable(unsigned int module);
 224
 225 +/* allow the ethernet driver to load a flash mapped mac addr */
 226 +const u8* ltq_get_eth_mac(void);
 227 +
 228  #endif /* CONFIG_SOC_TYPE_XWAY */
 229  #endif /* _LTQ_XWAY_H__ */
 230 --- /dev/null
 231 +++ b/arch/mips/lantiq/xway/eth_mac.c
 232 @@ -0,0 +1,76 @@
 233 +/*
 234 + *  Copyright (C) 2012 John Crispin <blogic@openwrt.org>
 235 + *
 236 + *  This program is free software; you can redistribute it and/or modify it
 237 + *  under the terms of the GNU General Public License version 2 as published
 238 + *  by the Free Software Foundation.
 239 + */
 240 +
 241 +#include <linux/init.h>
 242 +#include <linux/module.h>
 243 +#include <linux/of_platform.h>
 244 +#include <linux/if_ether.h>
 245 +
 246 +static u8 eth_mac[6];
 247 +static int eth_mac_set;
 248 +
 249 +const u8* ltq_get_eth_mac(void)
 250 +{
 251 +       return eth_mac;
 252 +}
 253 +
 254 +static int __init setup_ethaddr(char *str)
 255 +{
 256 +       eth_mac_set = mac_pton(str, eth_mac);
 257 +       return !eth_mac_set;
 258 +}
 259 +__setup("ethaddr=", setup_ethaddr);
 260 +
 261 +int __init of_eth_mac_probe(struct platform_device *pdev)
 262 +{
 263 +       struct device_node *np = pdev->dev.of_node;
 264 +       struct resource *mac_res;
 265 +       void __iomem *mac;
 266 +       u32 mac_inc = 0;
 267 +
 268 +       if (eth_mac_set) {
 269 +               dev_err(&pdev->dev, "mac was already set by bootloader\n");
 270 +               return -EINVAL;
 271 +       }
 272 +       mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 273 +
 274 +       if (!mac_res) {
 275 +               dev_err(&pdev->dev, "failed to load mac\n");
 276 +               return -EINVAL;
 277 +       }
 278 +       if (resource_size(mac_res) != 6) {
 279 +               dev_err(&pdev->dev, "mac has an invalid size\n");
 280 +               return -EINVAL;
 281 +       }
 282 +       mac = ioremap(mac_res->start, resource_size(mac_res));
 283 +       memcpy_fromio(eth_mac, mac, 6);
 284 +
 285 +       if (!of_property_read_u32(np, "mac-increment", &mac_inc))
 286 +               eth_mac[5] += mac_inc;
 287 +
 288 +       return 0;
 289 +}
 290 +
 291 +static struct of_device_id eth_mac_ids[] = {
 292 +       { .compatible = "lantiq,eth-mac" },
 293 +       { /* sentinel */ }
 294 +};
 295 +
 296 +static struct platform_driver eth_mac_driver = {
 297 +       .driver         = {
 298 +               .name           = "lantiq,eth-mac",
 299 +               .owner  = THIS_MODULE,
 300 +               .of_match_table = of_match_ptr(eth_mac_ids),
 301 +       },
 302 +};
 303 +
 304 +static int __init of_eth_mac_init(void)
 305 +{
 306 +       return platform_driver_probe(&eth_mac_driver, of_eth_mac_probe);
 307 +}
 308 +device_initcall(of_eth_mac_init);
 309 --- a/drivers/net/ethernet/lantiq_etop.c
 310 +++ b/drivers/net/ethernet/lantiq_etop.c
 311 @@ -825,7 +825,8 @@ ltq_etop_init(struct net_device *dev)
 312
 313         ltq_etop_change_mtu(dev, 1500);
 314
 315 -       memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
 316 +       if (priv->mac)
 317 +               memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
 318         if (!is_valid_ether_addr(mac.sa_data)) {
 319                 pr_warn("etop: invalid MAC, using random\n");
 320                 random_ether_addr(mac.sa_data);
 321 @@ -949,7 +950,9 @@ ltq_etop_probe(struct platform_device *p
 322         priv->tx_irq = irqres[0].start;
 323         priv->rx_irq = irqres[1].start;
 324         priv->mii_mode = of_get_phy_mode(pdev->dev.of_node);
 325 -       priv->mac = of_get_mac_address(pdev->dev.of_node);
 326 +       priv->mac = ltq_get_eth_mac();
 327 +       if (!priv->mac)
 328 +               priv->mac = of_get_mac_address(pdev->dev.of_node);
 329
 330         priv->clk_ppe = clk_get(&pdev->dev, NULL);
 331         if (IS_ERR(priv->clk_ppe))
 332 --- /dev/null
 333 +++ b/arch/mips/lantiq/xway/rt_eep.c
 334 @@ -0,0 +1,60 @@
 335 +/*
 336 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
 337 + *
 338 + *  This program is free software; you can redistribute it and/or modify it
 339 + *  under the terms of the GNU General Public License version 2 as published
 340 + *  by the Free Software Foundation.
 341 + */
 342 +
 343 +#include <linux/init.h>
 344 +#include <linux/module.h>
 345 +#include <linux/pci.h>
 346 +#include <linux/platform_device.h>
 347 +#include <linux/rt2x00_platform.h>
 348 +
 349 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
 350 +static struct rt2x00_platform_data rt2x00_pdata;
 351 +
 352 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
 353 +{
 354 +       dev->dev.platform_data = &rt2x00_pdata;
 355 +       return 0;
 356 +}
 357 +
 358 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
 359 +{
 360 +       struct device_node *np = pdev->dev.of_node;
 361 +       const char *eeprom;
 362 +
 363 +       if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
 364 +               dev_err(&pdev->dev, "failed to load eeprom filename\n");
 365 +               return 0;
 366 +       }
 367 +
 368 +       rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
 369 +//     rt2x00_pdata.mac_address = mac;
 370 +       ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
 371 +
 372 +       dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
 373 +
 374 +       return 0;
 375 +}
 376 +
 377 +static struct of_device_id ralink_eeprom_ids[] = {
 378 +       { .compatible = "ralink,eeprom" },
 379 +       { }
 380 +};
 381 +
 382 +static struct platform_driver ralink_eeprom_driver = {
 383 +       .driver         = {
 384 +               .name           = "ralink,eeprom",
 385 +               .owner  = THIS_MODULE,
 386 +               .of_match_table = of_match_ptr(ralink_eeprom_ids),
 387 +       },
 388 +};
 389 +
 390 +static int __init of_ralink_eeprom_init(void)
 391 +{
 392 +       return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
 393 +}
 394 +device_initcall(of_ralink_eeprom_init);
 395 --- /dev/null
 396 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
 397 @@ -0,0 +1,6 @@
 398 +#ifndef _PCI_ATH_FIXUP
 399 +#define _PCI_ATH_FIXUP
 400 +
 401 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
 402 +
 403 +#endif /* _PCI_ATH_FIXUP */
 404 --- /dev/null
 405 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
 406 @@ -0,0 +1,109 @@
 407 +/*
 408 + *  Atheros AP94 reference board PCI initialization
 409 + *
 410 + *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
 411 + *
 412 + *  This program is free software; you can redistribute it and/or modify it
 413 + *  under the terms of the GNU General Public License version 2 as published
 414 + *  by the Free Software Foundation.
 415 + */
 416 +
 417 +#include <linux/pci.h>
 418 +#include <linux/init.h>
 419 +#include <linux/delay.h>
 420 +#include <lantiq_soc.h>
 421 +
 422 +#define LTQ_PCI_MEM_BASE               0x18000000
 423 +
 424 +struct ath_fixup {
 425 +       u16             *cal_data;
 426 +       unsigned        slot;
 427 +};
 428 +
 429 +static int ath_num_fixups;
 430 +static struct ath_fixup ath_fixups[2];
 431 +
 432 +static void ath_pci_fixup(struct pci_dev *dev)
 433 +{
 434 +       void __iomem *mem;
 435 +       u16 *cal_data = NULL;
 436 +       u16 cmd;
 437 +       u32 bar0;
 438 +       u32 val;
 439 +       unsigned i;
 440 +
 441 +       for (i = 0; i < ath_num_fixups; i++) {
 442 +               if (ath_fixups[i].cal_data == NULL)
 443 +                       continue;
 444 +
 445 +               if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
 446 +                       continue;
 447 +
 448 +               cal_data = ath_fixups[i].cal_data;
 449 +               break;
 450 +       }
 451 +
 452 +       if (cal_data == NULL)
 453 +               return;
 454 +
 455 +       if (*cal_data != 0xa55a) {
 456 +               pr_err("pci %s: invalid calibration data\n", pci_name(dev));
 457 +               return;
 458 +       }
 459 +
 460 +       pr_info("pci %s: fixup device configuration\n", pci_name(dev));
 461 +
 462 +       mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
 463 +       if (!mem) {
 464 +               pr_err("pci %s: ioremap error\n", pci_name(dev));
 465 +               return;
 466 +       }
 467 +
 468 +       pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
 469 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
 470 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 471 +       cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
 472 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 473 +
 474 +       /* set pointer to first reg address */
 475 +       cal_data += 3;
 476 +       while (*cal_data != 0xffff) {
 477 +               u32 reg;
 478 +               reg = *cal_data++;
 479 +               val = *cal_data++;
 480 +               val |= (*cal_data++) << 16;
 481 +
 482 +               ltq_w32(swab32(val), mem + reg);
 483 +               udelay(100);
 484 +       }
 485 +
 486 +       pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
 487 +       dev->vendor = val & 0xffff;
 488 +       dev->device = (val >> 16) & 0xffff;
 489 +
 490 +       pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
 491 +       dev->revision = val & 0xff;
 492 +       dev->class = val >> 8; /* upper 3 bytes */
 493 +
 494 +       pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
 495 +               pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
 496 +
 497 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 498 +       cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
 499 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 500 +
 501 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 502 +
 503 +       iounmap(mem);
 504 +}
 505 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
 506 +
 507 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
 508 +{
 509 +       if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
 510 +               return;
 511 +
 512 +       ath_fixups[ath_num_fixups].slot = slot;
 513 +       ath_fixups[ath_num_fixups].cal_data = cal_data;
 514 +       ath_num_fixups++;
 515 +}