target/linux/lantiq/patches-3.2/0072-MIPS-lantiq-fix-spi-for-ase-update-for-clkdev-and-pl.patch

   1 From d1cd860adbd87c42c90db1c5658cf10ed1dbdd3e Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 12 Apr 2012 13:25:42 +0200
   4 Subject: [PATCH 72/73] MIPS: lantiq: fix spi for ase, update for clkdev and
   5  platform driver
   6
   7 irqs, gpios, chipselects
   8 updated to use module_platform_driver()
   9 clkdev is a bit hacky, using ltq_spi.0, as specifying no device numbering led to
  10 the mtd driver not hooking up to an spi flash.
  11
  12 Signed-off-by: Conor O'Gorman <i@conorogorman.net>
  13 ---
  14  .../mips/include/asm/mach-lantiq/xway/lantiq_irq.h |    4 ++
  15  arch/mips/lantiq/xway/sysctrl.c                    |    2 +-
  16  drivers/spi/spi-xway.c                             |   58 ++++++++++----------
  17  3 files changed, 35 insertions(+), 29 deletions(-)
  18
  19 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
  20 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
  21 @@ -30,6 +30,10 @@
  22  #define LTQ_SSC_TIR_AR9                (INT_NUM_IM0_IRL0 + 14)
  23  #define LTQ_SSC_RIR_AR9                (INT_NUM_IM0_IRL0 + 15)
  24  #define LTQ_SSC_EIR            (INT_NUM_IM0_IRL0 + 16)
  25 +#define LTQ_SSC_RIR_ASE                (INT_NUM_IM0_IRL0 + 16)
  26 +#define LTQ_SSC_TIR_ASE                (INT_NUM_IM0_IRL0 + 17)
  27 +#define LTQ_SSC_EIR_ASE                (INT_NUM_IM0_IRL0 + 18)
  28 +#define LTQ_SSC_FIR_ASE                (INT_NUM_IM0_IRL0 + 19)
  29
  30  #define LTQ_MEI_DYING_GASP_INT (INT_NUM_IM1_IRL0 + 21)
  31  #define LTQ_MEI_INT            (INT_NUM_IM1_IRL0 + 23)
  32 --- a/arch/mips/lantiq/xway/sysctrl.c
  33 +++ b/arch/mips/lantiq/xway/sysctrl.c
  34 @@ -233,7 +233,7 @@ void __init ltq_soc_init(void)
  35         clkdev_add_pmu("ltq_fpi", NULL, 0, PMU_FPI);
  36         clkdev_add_pmu("ltq_dma", NULL, 0, PMU_DMA);
  37         clkdev_add_pmu("ltq_stp", NULL, 0, PMU_STP);
  38 -       clkdev_add_pmu("ltq_spi", NULL, 0, PMU_SPI);
  39 +       clkdev_add_pmu("ltq_spi.0", NULL, 0, PMU_SPI);
  40          clkdev_add_pmu("ltq_gptu", NULL, 0, PMU_GPT);
  41          clkdev_add_pmu("ltq_ebu", NULL, 0, PMU_EBU);
  42         if (!ltq_is_vr9())
  43 --- a/drivers/spi/spi-xway.c
  44 +++ b/drivers/spi/spi-xway.c
  45 @@ -143,9 +143,9 @@
  46  #define LTQ_SPI_IRNEN_ALL      0xF
  47
  48  /* Hard-wired GPIOs used by SPI controller */
  49 -#define LTQ_SPI_GPIO_DI        16
  50 -#define LTQ_SPI_GPIO_DO                17
  51 -#define LTQ_SPI_GPIO_CLK       18
  52 +#define LTQ_SPI_GPIO_DI        (ltq_is_ase()?  8 : 16)
  53 +#define LTQ_SPI_GPIO_DO        (ltq_is_ase()?  9 : 17)
  54 +#define LTQ_SPI_GPIO_CLK       (ltq_is_ase()? 10 : 18)
  55
  56  struct ltq_spi {
  57         struct spi_bitbang      bitbang;
  58 @@ -229,7 +229,7 @@ static void ltq_spi_hw_enable(struct ltq
  59         u32 clc;
  60
  61         /* Power-up mdule */
  62 -        clk_enable(hw->spiclk);
  63 +       clk_enable(hw->spiclk);
  64
  65         /*
  66          * Set clock divider for run mode to 1 to
  67 @@ -245,7 +245,7 @@ static void ltq_spi_hw_disable(struct lt
  68         ltq_spi_reg_write(hw, LTQ_SPI_CLC_DISS, LTQ_SPI_CLC);
  69
  70         /* Power-down mdule */
  71 -        clk_disable(hw->spiclk);
  72 +       clk_disable(hw->spiclk);
  73  }
  74
  75  static void ltq_spi_reset_fifos(struct ltq_spi *hw)
  76 @@ -284,7 +284,7 @@ static inline int ltq_spi_wait_ready(str
  77                 cond_resched();
  78         } while (!time_after_eq(jiffies, timeout));
  79
  80 -       dev_err(hw->dev, "SPI wait ready timed out\n");
  81 +       dev_err(hw->dev, "SPI wait ready timed out stat: %x\n", stat);
  82
  83         return -ETIMEDOUT;
  84  }
  85 @@ -556,6 +556,12 @@ static const struct ltq_spi_cs_gpio_map
  86         { 11, 3 },
  87  };
  88
  89 +static const struct ltq_spi_cs_gpio_map ltq_spi_cs_ase[] = {
  90 +       {  7, 2 },
  91 +       { 15, 1 },
  92 +       { 14, 1 },
  93 +};
  94 +
  95  static int ltq_spi_setup(struct spi_device *spi)
  96  {
  97         struct ltq_spi *hw = ltq_spi_to_hw(spi);
  98 @@ -600,8 +606,10 @@ static int ltq_spi_setup(struct spi_devi
  99                 cstate->cs_activate = ltq_spi_gpio_cs_activate;
 100                 cstate->cs_deactivate = ltq_spi_gpio_cs_deactivate;
 101         } else {
 102 -               ret = ltq_gpio_request(&spi->dev, ltq_spi_cs[spi->chip_select].gpio,
 103 -                               ltq_spi_cs[spi->chip_select].mux,
 104 +               struct ltq_spi_cs_gpio_map *cs_map =
 105 +                               ltq_is_ase() ? ltq_spi_cs_ase : ltq_spi_cs;
 106 +               ret = ltq_gpio_request(&spi->dev, cs_map[spi->chip_select].gpio,
 107 +                               cs_map[spi->chip_select].mux,
 108                                 1, "spi-cs");
 109                 if (ret)
 110                         return -EBUSY;
 111 @@ -633,7 +641,8 @@ static void ltq_spi_cleanup(struct spi_d
 112         if (cdata && cdata->gpio)
 113                 gpio = cdata->gpio;
 114         else
 115 -               gpio = ltq_spi_cs[spi->chip_select].gpio;
 116 +               gpio = ltq_is_ase() ? ltq_spi_cs_ase[spi->chip_select].gpio :
 117 +                                        ltq_spi_cs[spi->chip_select].gpio;
 118
 119         gpio_free(gpio);
 120         kfree(cstate);
 121 @@ -868,7 +877,8 @@ static const struct ltq_spi_irq_map ltq_
 122         { "spi_err", ltq_spi_err_irq },
 123  };
 124
 125 -static int __init ltq_spi_probe(struct platform_device *pdev)
 126 +static int __devinit
 127 +ltq_spi_probe(struct platform_device *pdev)
 128  {
 129         struct spi_master *master;
 130         struct resource *r;
 131 @@ -910,14 +920,14 @@ static int __init ltq_spi_probe(struct p
 132
 133         hw->fpiclk = clk_get_fpi();
 134         if (IS_ERR(hw->fpiclk)) {
 135 -               dev_err(&pdev->dev, "clk_get\n");
 136 +               dev_err(&pdev->dev, "fpi clk\n");
 137                 ret = PTR_ERR(hw->fpiclk);
 138                 goto err_master;
 139         }
 140
 141         hw->spiclk = clk_get(&pdev->dev, NULL);
 142         if (IS_ERR(hw->spiclk)) {
 143 -               dev_err(&pdev->dev, "clk_get\n");
 144 +               dev_err(&pdev->dev, "spi clk\n");
 145                 ret = PTR_ERR(hw->spiclk);
 146                 goto err_master;
 147         }
 148 @@ -1014,7 +1024,8 @@ err:
 149         return ret;
 150  }
 151
 152 -static int __exit ltq_spi_remove(struct platform_device *pdev)
 153 +static int __devexit
 154 +ltq_spi_remove(struct platform_device *pdev)
 155  {
 156         struct ltq_spi *hw = platform_get_drvdata(pdev);
 157         int ret, i;
 158 @@ -1043,24 +1054,15 @@ static int __exit ltq_spi_remove(struct
 159  }
 160
 161  static struct platform_driver ltq_spi_driver = {
 162 +       .probe = ltq_spi_probe,
 163 +       .remove = __devexit_p(ltq_spi_remove),
 164         .driver = {
 165 -                  .name = "ltq_spi",
 166 -                  .owner = THIS_MODULE,
 167 -                  },
 168 -       .remove = __exit_p(ltq_spi_remove),
 169 +               .name = "ltq_spi",
 170 +               .owner = THIS_MODULE,
 171 +               },
 172  };
 173
 174 -static int __init ltq_spi_init(void)
 175 -{
 176 -       return platform_driver_probe(&ltq_spi_driver, ltq_spi_probe);
 177 -}
 178 -module_init(ltq_spi_init);
 179 -
 180 -static void __exit ltq_spi_exit(void)
 181 -{
 182 -       platform_driver_unregister(&ltq_spi_driver);
 183 -}
 184 -module_exit(ltq_spi_exit);
 185 +module_platform_driver(ltq_spi_driver);
 186
 187  MODULE_DESCRIPTION("Lantiq SoC SPI controller driver");
 188  MODULE_AUTHOR("Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>");