3bf3c5feb772832c06c5eb686ec4b75dfe6a7c0c
[openwrt.git] / target / linux / lantiq / patches-3.2 / 0072-MIPS-lantiq-fix-spi-for-ase-update-for-clkdev-and-pl.patch
1 From d1cd860adbd87c42c90db1c5658cf10ed1dbdd3e Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 12 Apr 2012 13:25:42 +0200
4 Subject: [PATCH 72/73] MIPS: lantiq: fix spi for ase, update for clkdev and
5  platform driver
6
7 irqs, gpios, chipselects
8 updated to use module_platform_driver()
9 clkdev is a bit hacky, using ltq_spi.0, as specifying no device numbering led to
10 the mtd driver not hooking up to an spi flash.
11
12 Signed-off-by: Conor O'Gorman <i@conorogorman.net>
13 ---
14  .../mips/include/asm/mach-lantiq/xway/lantiq_irq.h |    4 ++
15  arch/mips/lantiq/xway/sysctrl.c                    |    2 +-
16  drivers/spi/spi-xway.c                             |   58 ++++++++++----------
17  3 files changed, 35 insertions(+), 29 deletions(-)
18
19 diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
20 index d9c892b..d86acdd 100644
21 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
22 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
23 @@ -30,6 +30,10 @@
24  #define LTQ_SSC_TIR_AR9                (INT_NUM_IM0_IRL0 + 14)
25  #define LTQ_SSC_RIR_AR9                (INT_NUM_IM0_IRL0 + 15)
26  #define LTQ_SSC_EIR            (INT_NUM_IM0_IRL0 + 16)
27 +#define LTQ_SSC_RIR_ASE                (INT_NUM_IM0_IRL0 + 16)
28 +#define LTQ_SSC_TIR_ASE                (INT_NUM_IM0_IRL0 + 17)
29 +#define LTQ_SSC_EIR_ASE                (INT_NUM_IM0_IRL0 + 18)
30 +#define LTQ_SSC_FIR_ASE                (INT_NUM_IM0_IRL0 + 19)
31  
32  #define LTQ_MEI_DYING_GASP_INT (INT_NUM_IM1_IRL0 + 21)
33  #define LTQ_MEI_INT            (INT_NUM_IM1_IRL0 + 23)
34 diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
35 index 5807456..de4ce8f 100644
36 --- a/arch/mips/lantiq/xway/sysctrl.c
37 +++ b/arch/mips/lantiq/xway/sysctrl.c
38 @@ -233,7 +233,7 @@ void __init ltq_soc_init(void)
39         clkdev_add_pmu("ltq_fpi", NULL, 0, PMU_FPI);
40         clkdev_add_pmu("ltq_dma", NULL, 0, PMU_DMA);
41         clkdev_add_pmu("ltq_stp", NULL, 0, PMU_STP);
42 -       clkdev_add_pmu("ltq_spi", NULL, 0, PMU_SPI);
43 +       clkdev_add_pmu("ltq_spi.0", NULL, 0, PMU_SPI);
44          clkdev_add_pmu("ltq_gptu", NULL, 0, PMU_GPT);
45          clkdev_add_pmu("ltq_ebu", NULL, 0, PMU_EBU);
46         if (!ltq_is_vr9())
47 diff --git a/drivers/spi/spi-xway.c b/drivers/spi/spi-xway.c
48 index 016a6d0..be5c25b 100644
49 --- a/drivers/spi/spi-xway.c
50 +++ b/drivers/spi/spi-xway.c
51 @@ -143,9 +143,9 @@
52  #define LTQ_SPI_IRNEN_ALL      0xF
53  
54  /* Hard-wired GPIOs used by SPI controller */
55 -#define LTQ_SPI_GPIO_DI        16
56 -#define LTQ_SPI_GPIO_DO                17
57 -#define LTQ_SPI_GPIO_CLK       18
58 +#define LTQ_SPI_GPIO_DI        (ltq_is_ase()?  8 : 16)
59 +#define LTQ_SPI_GPIO_DO        (ltq_is_ase()?  9 : 17)
60 +#define LTQ_SPI_GPIO_CLK       (ltq_is_ase()? 10 : 18)
61  
62  struct ltq_spi {
63         struct spi_bitbang      bitbang;
64 @@ -229,7 +229,7 @@ static void ltq_spi_hw_enable(struct ltq_spi *hw)
65         u32 clc;
66  
67         /* Power-up mdule */
68 -        clk_enable(hw->spiclk);
69 +       clk_enable(hw->spiclk);
70  
71         /*
72          * Set clock divider for run mode to 1 to
73 @@ -245,7 +245,7 @@ static void ltq_spi_hw_disable(struct ltq_spi *hw)
74         ltq_spi_reg_write(hw, LTQ_SPI_CLC_DISS, LTQ_SPI_CLC);
75  
76         /* Power-down mdule */
77 -        clk_disable(hw->spiclk);
78 +       clk_disable(hw->spiclk);
79  }
80  
81  static void ltq_spi_reset_fifos(struct ltq_spi *hw)
82 @@ -284,7 +284,7 @@ static inline int ltq_spi_wait_ready(struct ltq_spi *hw)
83                 cond_resched();
84         } while (!time_after_eq(jiffies, timeout));
85  
86 -       dev_err(hw->dev, "SPI wait ready timed out\n");
87 +       dev_err(hw->dev, "SPI wait ready timed out stat: %x\n", stat);
88  
89         return -ETIMEDOUT;
90  }
91 @@ -556,6 +556,12 @@ static const struct ltq_spi_cs_gpio_map ltq_spi_cs[] = {
92         { 11, 3 },
93  };
94  
95 +static const struct ltq_spi_cs_gpio_map ltq_spi_cs_ase[] = {
96 +       {  7, 2 },
97 +       { 15, 1 },
98 +       { 14, 1 },
99 +};
100 +
101  static int ltq_spi_setup(struct spi_device *spi)
102  {
103         struct ltq_spi *hw = ltq_spi_to_hw(spi);
104 @@ -600,8 +606,10 @@ static int ltq_spi_setup(struct spi_device *spi)
105                 cstate->cs_activate = ltq_spi_gpio_cs_activate;
106                 cstate->cs_deactivate = ltq_spi_gpio_cs_deactivate;
107         } else {
108 -               ret = ltq_gpio_request(&spi->dev, ltq_spi_cs[spi->chip_select].gpio,
109 -                               ltq_spi_cs[spi->chip_select].mux,
110 +               struct ltq_spi_cs_gpio_map *cs_map =
111 +                               ltq_is_ase() ? ltq_spi_cs_ase : ltq_spi_cs;
112 +               ret = ltq_gpio_request(&spi->dev, cs_map[spi->chip_select].gpio,
113 +                               cs_map[spi->chip_select].mux,
114                                 1, "spi-cs");
115                 if (ret)
116                         return -EBUSY;
117 @@ -633,7 +641,8 @@ static void ltq_spi_cleanup(struct spi_device *spi)
118         if (cdata && cdata->gpio)
119                 gpio = cdata->gpio;
120         else
121 -               gpio = ltq_spi_cs[spi->chip_select].gpio;
122 +               gpio = ltq_is_ase() ? ltq_spi_cs_ase[spi->chip_select].gpio :
123 +                                        ltq_spi_cs[spi->chip_select].gpio;
124  
125         gpio_free(gpio);
126         kfree(cstate);
127 @@ -868,7 +877,8 @@ static const struct ltq_spi_irq_map ltq_spi_irqs[] = {
128         { "spi_err", ltq_spi_err_irq },
129  };
130  
131 -static int __init ltq_spi_probe(struct platform_device *pdev)
132 +static int __devinit
133 +ltq_spi_probe(struct platform_device *pdev)
134  {
135         struct spi_master *master;
136         struct resource *r;
137 @@ -910,14 +920,14 @@ static int __init ltq_spi_probe(struct platform_device *pdev)
138  
139         hw->fpiclk = clk_get_fpi();
140         if (IS_ERR(hw->fpiclk)) {
141 -               dev_err(&pdev->dev, "clk_get\n");
142 +               dev_err(&pdev->dev, "fpi clk\n");
143                 ret = PTR_ERR(hw->fpiclk);
144                 goto err_master;
145         }
146  
147         hw->spiclk = clk_get(&pdev->dev, NULL);
148         if (IS_ERR(hw->spiclk)) {
149 -               dev_err(&pdev->dev, "clk_get\n");
150 +               dev_err(&pdev->dev, "spi clk\n");
151                 ret = PTR_ERR(hw->spiclk);
152                 goto err_master;
153         }
154 @@ -1014,7 +1024,8 @@ err:
155         return ret;
156  }
157  
158 -static int __exit ltq_spi_remove(struct platform_device *pdev)
159 +static int __devexit
160 +ltq_spi_remove(struct platform_device *pdev)
161  {
162         struct ltq_spi *hw = platform_get_drvdata(pdev);
163         int ret, i;
164 @@ -1043,24 +1054,15 @@ static int __exit ltq_spi_remove(struct platform_device *pdev)
165  }
166  
167  static struct platform_driver ltq_spi_driver = {
168 +       .probe = ltq_spi_probe,
169 +       .remove = __devexit_p(ltq_spi_remove),
170         .driver = {
171 -                  .name = "ltq_spi",
172 -                  .owner = THIS_MODULE,
173 -                  },
174 -       .remove = __exit_p(ltq_spi_remove),
175 +               .name = "ltq_spi",
176 +               .owner = THIS_MODULE,
177 +               },
178  };
179  
180 -static int __init ltq_spi_init(void)
181 -{
182 -       return platform_driver_probe(&ltq_spi_driver, ltq_spi_probe);
183 -}
184 -module_init(ltq_spi_init);
185 -
186 -static void __exit ltq_spi_exit(void)
187 -{
188 -       platform_driver_unregister(&ltq_spi_driver);
189 -}
190 -module_exit(ltq_spi_exit);
191 +module_platform_driver(ltq_spi_driver);
192  
193  MODULE_DESCRIPTION("Lantiq SoC SPI controller driver");
194  MODULE_AUTHOR("Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>");
195 -- 
196 1.7.9.1
197