target/linux/lantiq/patches/0023-MIPS-lantiq-adds-basic-vr9-support.patch

   1 From 780a64cd52209fad15c7133f950b2b2d6b9b59e2 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sat, 27 Aug 2011 21:44:32 +0200
   4 Subject: [PATCH 23/24] MIPS: lantiq: adds basic vr9 support
   5
   6 ---
   7  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    2 +
   8  arch/mips/lantiq/Kconfig                           |    9 ++
   9  arch/mips/lantiq/Platform                          |    1 +
  10  arch/mips/lantiq/machtypes.h                       |    3 +
  11  arch/mips/lantiq/xway/Kconfig                      |   12 +++
  12  arch/mips/lantiq/xway/Makefile                     |    2 +
  13  arch/mips/lantiq/xway/clk-vr9.c                    |   78 ++++++++++++++++++++
  14  arch/mips/lantiq/xway/mach-fritz.c                 |   74 +++++++++++++++++++
  15  arch/mips/lantiq/xway/prom-vr9.c                   |   55 ++++++++++++++
  16  arch/mips/pci/Makefile                             |    2 +-
  17  10 files changed, 237 insertions(+), 1 deletions(-)
  18  create mode 100644 arch/mips/lantiq/xway/clk-vr9.c
  19  create mode 100644 arch/mips/lantiq/xway/mach-fritz.c
  20  create mode 100644 arch/mips/lantiq/xway/prom-vr9.c
  21
  22 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  23 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  24 @@ -21,6 +21,7 @@
  25  #define SOC_ID_ARX188          0x16C
  26  #define SOC_ID_ARX168          0x16D
  27  #define SOC_ID_ARX182          0x16F
  28 +#define SOC_ID_VRX288          0x1C0
  29
  30  /* SoC Types */
  31  #define SOC_TYPE_DANUBE                0x01
  32 @@ -91,6 +92,7 @@
  33
  34  /* ETOP - ethernet */
  35  #define LTQ_ETOP_BASE_ADDR     0x1E180000
  36 +#define LTQ_ETOP_BASE_ADDR_VR9 0x1E200000
  37  #define LTQ_ETOP_SIZE          0x40000
  38
  39  /* GBIT - gigabit switch */
  40 --- a/arch/mips/lantiq/Kconfig
  41 +++ b/arch/mips/lantiq/Kconfig
  42 @@ -1,5 +1,8 @@
  43  if LANTIQ
  44
  45 +config LANTIQ_PCIE
  46 +       bool
  47 +
  48  config SOC_TYPE_XWAY
  49         bool
  50         default n
  51 @@ -17,6 +20,12 @@ config SOC_XWAY
  52         select SOC_TYPE_XWAY
  53         select HW_HAS_PCI
  54
  55 +config SOC_VR9
  56 +       bool "VR9"
  57 +       select SOC_TYPE_XWAY
  58 +       select HW_HAS_PCI
  59 +       select LANTIQ_PCIE
  60 +
  61  config SOC_FALCON
  62         bool "FALCON"
  63  endchoice
  64 --- a/arch/mips/lantiq/Platform
  65 +++ b/arch/mips/lantiq/Platform
  66 @@ -6,4 +6,5 @@ platform-$(CONFIG_LANTIQ)       += lantiq/
  67  cflags-$(CONFIG_LANTIQ)                += -I$(srctree)/arch/mips/include/asm/mach-lantiq
  68  load-$(CONFIG_LANTIQ)          = 0xffffffff80002000
  69  cflags-$(CONFIG_SOC_TYPE_XWAY) += -I$(srctree)/arch/mips/include/asm/mach-lantiq/xway
  70 +cflags-$(CONFIG_SOC_TYPE_VR9)  += -I$(srctree)/arch/mips/include/asm/mach-lantiq/xway
  71  cflags-$(CONFIG_SOC_FALCON)    += -I$(srctree)/arch/mips/include/asm/mach-lantiq/falcon
  72 --- a/arch/mips/lantiq/machtypes.h
  73 +++ b/arch/mips/lantiq/machtypes.h
  74 @@ -20,6 +20,9 @@ enum lantiq_mach_type {
  75         LANTIQ_MACH_EASY98000,          /* Falcon Eval Board, NOR Flash */
  76         LANTIQ_MACH_EASY98000SF,        /* Falcon Eval Board, Serial Flash */
  77         LANTIQ_MACH_EASY98000NAND,      /* Falcon Eval Board, NAND Flash */
  78 +
  79 +       /* FRITZ!BOX */
  80 +       LANTIQ_MACH_FRITZ3370,          /* FRITZ!BOX 3370 vdsl cpe */
  81  };
  82
  83  #endif
  84 --- a/arch/mips/lantiq/xway/Kconfig
  85 +++ b/arch/mips/lantiq/xway/Kconfig
  86 @@ -21,3 +21,15 @@ config LANTIQ_MACH_EASY50601
  87  endmenu
  88
  89  endif
  90 +
  91 +if SOC_VR9
  92 +
  93 +menu "MIPS Machine"
  94 +
  95 +config LANTIQ_MACH_FRITZ3370
  96 +       bool "Fritz!Box 3370"
  97 +       default y
  98 +
  99 +endmenu
 100 +
 101 +endif
 102 --- a/arch/mips/lantiq/xway/Makefile
 103 +++ b/arch/mips/lantiq/xway/Makefile
 104 @@ -2,6 +2,8 @@ obj-y := sysctrl.o reset.o gpio.o gpio_s
 105
 106  obj-$(CONFIG_SOC_XWAY) += clk-xway.o prom-xway.o
 107  obj-$(CONFIG_SOC_AMAZON_SE) += clk-ase.o prom-ase.o
 108 +obj-$(CONFIG_SOC_VR9) += clk-vr9.o prom-vr9.o
 109
 110  obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o
 111  obj-$(CONFIG_LANTIQ_MACH_EASY50601) += mach-easy50601.o
 112 +obj-$(CONFIG_LANTIQ_MACH_FRITZ3370) += mach-fritz.o
 113 --- /dev/null
 114 +++ b/arch/mips/lantiq/xway/clk-vr9.c
 115 @@ -0,0 +1,78 @@
 116 +/*
 117 + *  This program is free software; you can redistribute it and/or modify it
 118 + *  under the terms of the GNU General Public License version 2 as published
 119 + *  by the Free Software Foundation.
 120 + *
 121 + *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
 122 + */
 123 +
 124 +#include <linux/io.h>
 125 +#include <linux/module.h>
 126 +#include <linux/init.h>
 127 +#include <linux/clk.h>
 128 +
 129 +#include <asm/time.h>
 130 +#include <asm/irq.h>
 131 +#include <asm/div64.h>
 132 +
 133 +#include <lantiq_soc.h>
 134 +
 135 +#define CLOCK_62_5M                         62500000
 136 +#define CLOCK_83_5M                         83500000
 137 +#define CLOCK_125M                          125000000
 138 +#define CLOCK_200M                          200000000
 139 +#define CLOCK_250M                          250000000
 140 +#define CLOCK_300M                          300000000
 141 +#define CLOCK_98_304M                       98304000
 142 +#define CLOCK_150M                          150000000
 143 +#define CLOCK_196_608M                      196608000
 144 +#define CLOCK_600M                          600000000
 145 +#define CLOCK_500M                          500000000
 146 +#define CLOCK_393M                          393215332
 147 +#define CLOCK_166M                          166666666
 148 +
 149 +#define LTQ_CGU_SYS    0x0c
 150 +#define LTQ_CGU_IF_CLK 0x24
 151 +
 152 +unsigned int ltq_get_cpu_hz(void)
 153 +{
 154 +       int clks[] = {
 155 +               CLOCK_600M, CLOCK_500M, CLOCK_393M, CLOCK_333M, CLOCK_125M,
 156 +               CLOCK_125M, CLOCK_196_608M, CLOCK_166M, CLOCK_125M, CLOCK_125M };
 157 +       int val = (ltq_cgu_r32(LTQ_CGU_SYS) >> 4) & 0xf;
 158 +
 159 +       if (val > 9)
 160 +               panic("bad cpu speed\n");
 161 +       if (val == 2)
 162 +               panic("missing workaround\n");
 163 +               //cgu_get_pll1_fosc(); //CLOCK_393M;
 164 +       return clks[val];
 165 +}
 166 +EXPORT_SYMBOL(ltq_get_cpu_hz);
 167 +
 168 +unsigned int ltq_get_fpi_hz(void)
 169 +{
 170 +       int clks[] = {
 171 +               CLOCK_62_5M, CLOCK_62_5M, CLOCK_83_5M, CLOCK_125M, CLOCK_125M,
 172 +               CLOCK_125M, CLOCK_167M, CLOCK_200M, CLOCK_250M, CLOCK_300M,
 173 +               CLOCK_62_5M, CLOCK_98_304M, CLOCK_150M, CLOCK_196_608M };
 174 +       int val = ((ltq_cgu_r32(LTQ_CGU_IF_CLK) >> 25) & 0xf);
 175 +
 176 +       if (val > 13)
 177 +               panic("bad fpi speed\n");
 178 +
 179 +       return clks[val];
 180 +}
 181 +EXPORT_SYMBOL(ltq_get_fpi_hz);
 182 +
 183 +unsigned int ltq_get_io_region_clock(void)
 184 +{
 185 +       return ltq_get_fpi_hz() / 2;
 186 +}
 187 +EXPORT_SYMBOL(ltq_get_io_region_clock);
 188 +
 189 +unsigned int ltq_get_fpi_bus_clock(int fpi)
 190 +{
 191 +       return ltq_get_fpi_hz();
 192 +}
 193 +EXPORT_SYMBOL(ltq_get_fpi_bus_clock);
 194 --- /dev/null
 195 +++ b/arch/mips/lantiq/xway/prom-vr9.c
 196 @@ -0,0 +1,55 @@
 197 +/*
 198 + *  This program is free software; you can redistribute it and/or modify it
 199 + *  under the terms of the GNU General Public License version 2 as published
 200 + *  by the Free Software Foundation.
 201 + *
 202 + *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
 203 + */
 204 +
 205 +#include <linux/module.h>
 206 +#include <linux/clk.h>
 207 +#include <asm/bootinfo.h>
 208 +#include <asm/time.h>
 209 +
 210 +#include <lantiq_soc.h>
 211 +
 212 +#include "devices.h"
 213 +#include "../prom.h"
 214 +
 215 +#define SOC_VRX288     "VRX288"
 216 +
 217 +#define PART_SHIFT     12
 218 +#define PART_MASK      0x0FFFFFFF
 219 +#define REV_SHIFT      28
 220 +#define REV_MASK       0xF0000000
 221 +
 222 +void __init ltq_soc_detect(struct ltq_soc_info *i)
 223 +{
 224 +       i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
 225 +       i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
 226 +       sprintf(i->rev_type, "1.%d", i->rev);
 227 +       switch (i->partnum) {
 228 +       case SOC_ID_VRX288:
 229 +               i->name = SOC_VRX288;
 230 +               i->type = SOC_TYPE_VR9;
 231 +               break;
 232 +
 233 +       default:
 234 +               unreachable();
 235 +               break;
 236 +       }
 237 +       printk("%08X\n", i->partnum);
 238 +}
 239 +
 240 +void __init ltq_soc_setup(void)
 241 +{
 242 +       /*
 243 +               reg = IFX_REG_R32(IFX_XBAR_ALWAYS_LAST);
 244 +               reg &= ~ IFX_XBAR_FPI_BURST_EN;
 245 +               IFX_REG_W32(reg, IFX_XBAR_ALWAYS_LAST);
 246 +       */
 247 +
 248 +       ltq_register_asc(1);
 249 +       ltq_register_gpio();
 250 +       ltq_register_wdt();
 251 +}
 252 --- a/arch/mips/pci/Makefile
 253 +++ b/arch/mips/pci/Makefile
 254 @@ -41,7 +41,7 @@ obj-$(CONFIG_SIBYTE_SB1250)   += fixup-sb1
 255  obj-$(CONFIG_SIBYTE_BCM112X)   += fixup-sb1250.o pci-sb1250.o
 256  obj-$(CONFIG_SIBYTE_BCM1x80)   += pci-bcm1480.o pci-bcm1480ht.o
 257  obj-$(CONFIG_SNI_RM)           += fixup-sni.o ops-sni.o
 258 -obj-$(CONFIG_SOC_XWAY)         += pci-lantiq.o ops-lantiq.o
 259 +obj-$(CONFIG_LANTIQ)           += pci-lantiq.o ops-lantiq.o
 260  obj-$(CONFIG_TANBAC_TB0219)    += fixup-tb0219.o
 261  obj-$(CONFIG_TANBAC_TB0226)    += fixup-tb0226.o
 262  obj-$(CONFIG_TANBAC_TB0287)    += fixup-tb0287.o