ipq806x: add power regulators support
[15.05/openwrt.git] / target / linux / ipq806x / patches-3.18 / 120-mfd-qcom-rpm-Driver-for-the-Qualcomm-RPM.patch
1 From 58e214382bdd1eb48c5a3519182bddcb26edabad Mon Sep 17 00:00:00 2001
2 From: Bjorn Andersson <bjorn.andersson@sonymobile.com>
3 Date: Wed, 26 Nov 2014 13:51:00 -0800
4 Subject: [PATCH] mfd: qcom-rpm: Driver for the Qualcomm RPM
5
6 Driver for the Resource Power Manager (RPM) found in Qualcomm 8660, 8960
7 and 8064 based devices. The driver exposes resources that child drivers
8 can operate on; to implementing regulator, clock and bus frequency
9 drivers.
10
11 Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
12 Signed-off-by: Lee Jones <lee.jones@linaro.org>
13 ---
14  drivers/mfd/Kconfig          |  14 ++
15  drivers/mfd/Makefile         |   1 +
16  drivers/mfd/qcom_rpm.c       | 581 +++++++++++++++++++++++++++++++++++++++++++
17  include/linux/mfd/qcom_rpm.h |  13 +
18  4 files changed, 609 insertions(+)
19  create mode 100644 drivers/mfd/qcom_rpm.c
20  create mode 100644 include/linux/mfd/qcom_rpm.h
21
22 --- a/drivers/mfd/Kconfig
23 +++ b/drivers/mfd/Kconfig
24 @@ -567,6 +567,20 @@ config MFD_PM8921_CORE
25           Say M here if you want to include support for PM8921 chip as a module.
26           This will build a module called "pm8921-core".
27  
28 +config MFD_QCOM_RPM
29 +       tristate "Qualcomm Resource Power Manager (RPM)"
30 +       depends on ARCH_QCOM && OF
31 +       help
32 +         If you say yes to this option, support will be included for the
33 +         Resource Power Manager system found in the Qualcomm 8660, 8960 and
34 +         8064 based devices.
35 +
36 +         This is required to access many regulators, clocks and bus
37 +         frequencies controlled by the RPM on these devices.
38 +
39 +         Say M here if you want to include support for the Qualcomm RPM as a
40 +         module. This will build a module called "qcom_rpm".
41 +
42  config MFD_SPMI_PMIC
43         tristate "Qualcomm SPMI PMICs"
44         depends on ARCH_QCOM || COMPILE_TEST
45 --- a/drivers/mfd/Makefile
46 +++ b/drivers/mfd/Makefile
47 @@ -153,6 +153,7 @@ obj-$(CONFIG_MFD_SI476X_CORE)       += si476x-
48  obj-$(CONFIG_MFD_CS5535)       += cs5535-mfd.o
49  obj-$(CONFIG_MFD_OMAP_USB_HOST)        += omap-usb-host.o omap-usb-tll.o
50  obj-$(CONFIG_MFD_PM8921_CORE)  += pm8921-core.o ssbi.o
51 +obj-$(CONFIG_MFD_QCOM_RPM)     += qcom_rpm.o
52  obj-$(CONFIG_MFD_SPMI_PMIC)    += qcom-spmi-pmic.o
53  obj-$(CONFIG_TPS65911_COMPARATOR)      += tps65911-comparator.o
54  obj-$(CONFIG_MFD_TPS65090)     += tps65090.o
55 --- /dev/null
56 +++ b/drivers/mfd/qcom_rpm.c
57 @@ -0,0 +1,581 @@
58 +/*
59 + * Copyright (c) 2014, Sony Mobile Communications AB.
60 + * Copyright (c) 2013, The Linux Foundation. All rights reserved.
61 + * Author: Bjorn Andersson <bjorn.andersson@sonymobile.com>
62 + *
63 + * This program is free software; you can redistribute it and/or modify
64 + * it under the terms of the GNU General Public License version 2 and
65 + * only version 2 as published by the Free Software Foundation.
66 + *
67 + * This program is distributed in the hope that it will be useful,
68 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
69 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
70 + * GNU General Public License for more details.
71 + */
72 +
73 +#include <linux/module.h>
74 +#include <linux/platform_device.h>
75 +#include <linux/of_platform.h>
76 +#include <linux/io.h>
77 +#include <linux/interrupt.h>
78 +#include <linux/mfd/qcom_rpm.h>
79 +#include <linux/mfd/syscon.h>
80 +#include <linux/regmap.h>
81 +
82 +#include <dt-bindings/mfd/qcom-rpm.h>
83 +
84 +struct qcom_rpm_resource {
85 +       unsigned target_id;
86 +       unsigned status_id;
87 +       unsigned select_id;
88 +       unsigned size;
89 +};
90 +
91 +struct qcom_rpm_data {
92 +       u32 version;
93 +       const struct qcom_rpm_resource *resource_table;
94 +       unsigned n_resources;
95 +};
96 +
97 +struct qcom_rpm {
98 +       struct device *dev;
99 +       struct regmap *ipc_regmap;
100 +       unsigned ipc_offset;
101 +       unsigned ipc_bit;
102 +
103 +       struct completion ack;
104 +       struct mutex lock;
105 +
106 +       void __iomem *status_regs;
107 +       void __iomem *ctrl_regs;
108 +       void __iomem *req_regs;
109 +
110 +       u32 ack_status;
111 +
112 +       const struct qcom_rpm_data *data;
113 +};
114 +
115 +#define RPM_STATUS_REG(rpm, i) ((rpm)->status_regs + (i) * 4)
116 +#define RPM_CTRL_REG(rpm, i)   ((rpm)->ctrl_regs + (i) * 4)
117 +#define RPM_REQ_REG(rpm, i)    ((rpm)->req_regs + (i) * 4)
118 +
119 +#define RPM_REQUEST_TIMEOUT    (5 * HZ)
120 +
121 +#define RPM_REQUEST_CONTEXT    3
122 +#define RPM_REQ_SELECT         11
123 +#define RPM_ACK_CONTEXT                15
124 +#define RPM_ACK_SELECTOR       23
125 +#define RPM_SELECT_SIZE                7
126 +
127 +#define RPM_NOTIFICATION       BIT(30)
128 +#define RPM_REJECTED           BIT(31)
129 +
130 +#define RPM_SIGNAL             BIT(2)
131 +
132 +static const struct qcom_rpm_resource apq8064_rpm_resource_table[] = {
133 +       [QCOM_RPM_CXO_CLK] =                    { 25, 9, 5, 1 },
134 +       [QCOM_RPM_PXO_CLK] =                    { 26, 10, 6, 1 },
135 +       [QCOM_RPM_APPS_FABRIC_CLK] =            { 27, 11, 8, 1 },
136 +       [QCOM_RPM_SYS_FABRIC_CLK] =             { 28, 12, 9, 1 },
137 +       [QCOM_RPM_MM_FABRIC_CLK] =              { 29, 13, 10, 1 },
138 +       [QCOM_RPM_DAYTONA_FABRIC_CLK] =         { 30, 14, 11, 1 },
139 +       [QCOM_RPM_SFPB_CLK] =                   { 31, 15, 12, 1 },
140 +       [QCOM_RPM_CFPB_CLK] =                   { 32, 16, 13, 1 },
141 +       [QCOM_RPM_MMFPB_CLK] =                  { 33, 17, 14, 1 },
142 +       [QCOM_RPM_EBI1_CLK] =                   { 34, 18, 16, 1 },
143 +       [QCOM_RPM_APPS_FABRIC_HALT] =           { 35, 19, 18, 1 },
144 +       [QCOM_RPM_APPS_FABRIC_MODE] =           { 37, 20, 19, 1 },
145 +       [QCOM_RPM_APPS_FABRIC_IOCTL] =          { 40, 21, 20, 1 },
146 +       [QCOM_RPM_APPS_FABRIC_ARB] =            { 41, 22, 21, 12 },
147 +       [QCOM_RPM_SYS_FABRIC_HALT] =            { 53, 23, 22, 1 },
148 +       [QCOM_RPM_SYS_FABRIC_MODE] =            { 55, 24, 23, 1 },
149 +       [QCOM_RPM_SYS_FABRIC_IOCTL] =           { 58, 25, 24, 1 },
150 +       [QCOM_RPM_SYS_FABRIC_ARB] =             { 59, 26, 25, 30 },
151 +       [QCOM_RPM_MM_FABRIC_HALT] =             { 89, 27, 26, 1 },
152 +       [QCOM_RPM_MM_FABRIC_MODE] =             { 91, 28, 27, 1 },
153 +       [QCOM_RPM_MM_FABRIC_IOCTL] =            { 94, 29, 28, 1 },
154 +       [QCOM_RPM_MM_FABRIC_ARB] =              { 95, 30, 29, 21 },
155 +       [QCOM_RPM_PM8921_SMPS1] =               { 116, 31, 30, 2 },
156 +       [QCOM_RPM_PM8921_SMPS2] =               { 118, 33, 31, 2 },
157 +       [QCOM_RPM_PM8921_SMPS3] =               { 120, 35, 32, 2 },
158 +       [QCOM_RPM_PM8921_SMPS4] =               { 122, 37, 33, 2 },
159 +       [QCOM_RPM_PM8921_SMPS5] =               { 124, 39, 34, 2 },
160 +       [QCOM_RPM_PM8921_SMPS6] =               { 126, 41, 35, 2 },
161 +       [QCOM_RPM_PM8921_SMPS7] =               { 128, 43, 36, 2 },
162 +       [QCOM_RPM_PM8921_SMPS8] =               { 130, 45, 37, 2 },
163 +       [QCOM_RPM_PM8921_LDO1] =                { 132, 47, 38, 2 },
164 +       [QCOM_RPM_PM8921_LDO2] =                { 134, 49, 39, 2 },
165 +       [QCOM_RPM_PM8921_LDO3] =                { 136, 51, 40, 2 },
166 +       [QCOM_RPM_PM8921_LDO4] =                { 138, 53, 41, 2 },
167 +       [QCOM_RPM_PM8921_LDO5] =                { 140, 55, 42, 2 },
168 +       [QCOM_RPM_PM8921_LDO6] =                { 142, 57, 43, 2 },
169 +       [QCOM_RPM_PM8921_LDO7] =                { 144, 59, 44, 2 },
170 +       [QCOM_RPM_PM8921_LDO8] =                { 146, 61, 45, 2 },
171 +       [QCOM_RPM_PM8921_LDO9] =                { 148, 63, 46, 2 },
172 +       [QCOM_RPM_PM8921_LDO10] =               { 150, 65, 47, 2 },
173 +       [QCOM_RPM_PM8921_LDO11] =               { 152, 67, 48, 2 },
174 +       [QCOM_RPM_PM8921_LDO12] =               { 154, 69, 49, 2 },
175 +       [QCOM_RPM_PM8921_LDO13] =               { 156, 71, 50, 2 },
176 +       [QCOM_RPM_PM8921_LDO14] =               { 158, 73, 51, 2 },
177 +       [QCOM_RPM_PM8921_LDO15] =               { 160, 75, 52, 2 },
178 +       [QCOM_RPM_PM8921_LDO16] =               { 162, 77, 53, 2 },
179 +       [QCOM_RPM_PM8921_LDO17] =               { 164, 79, 54, 2 },
180 +       [QCOM_RPM_PM8921_LDO18] =               { 166, 81, 55, 2 },
181 +       [QCOM_RPM_PM8921_LDO19] =               { 168, 83, 56, 2 },
182 +       [QCOM_RPM_PM8921_LDO20] =               { 170, 85, 57, 2 },
183 +       [QCOM_RPM_PM8921_LDO21] =               { 172, 87, 58, 2 },
184 +       [QCOM_RPM_PM8921_LDO22] =               { 174, 89, 59, 2 },
185 +       [QCOM_RPM_PM8921_LDO23] =               { 176, 91, 60, 2 },
186 +       [QCOM_RPM_PM8921_LDO24] =               { 178, 93, 61, 2 },
187 +       [QCOM_RPM_PM8921_LDO25] =               { 180, 95, 62, 2 },
188 +       [QCOM_RPM_PM8921_LDO26] =               { 182, 97, 63, 2 },
189 +       [QCOM_RPM_PM8921_LDO27] =               { 184, 99, 64, 2 },
190 +       [QCOM_RPM_PM8921_LDO28] =               { 186, 101, 65, 2 },
191 +       [QCOM_RPM_PM8921_LDO29] =               { 188, 103, 66, 2 },
192 +       [QCOM_RPM_PM8921_CLK1] =                { 190, 105, 67, 2 },
193 +       [QCOM_RPM_PM8921_CLK2] =                { 192, 107, 68, 2 },
194 +       [QCOM_RPM_PM8921_LVS1] =                { 194, 109, 69, 1 },
195 +       [QCOM_RPM_PM8921_LVS2] =                { 195, 110, 70, 1 },
196 +       [QCOM_RPM_PM8921_LVS3] =                { 196, 111, 71, 1 },
197 +       [QCOM_RPM_PM8921_LVS4] =                { 197, 112, 72, 1 },
198 +       [QCOM_RPM_PM8921_LVS5] =                { 198, 113, 73, 1 },
199 +       [QCOM_RPM_PM8921_LVS6] =                { 199, 114, 74, 1 },
200 +       [QCOM_RPM_PM8921_LVS7] =                { 200, 115, 75, 1 },
201 +       [QCOM_RPM_PM8821_SMPS1] =               { 201, 116, 76, 2 },
202 +       [QCOM_RPM_PM8821_SMPS2] =               { 203, 118, 77, 2 },
203 +       [QCOM_RPM_PM8821_LDO1] =                { 205, 120, 78, 2 },
204 +       [QCOM_RPM_PM8921_NCP] =                 { 207, 122, 80, 2 },
205 +       [QCOM_RPM_CXO_BUFFERS] =                { 209, 124, 81, 1 },
206 +       [QCOM_RPM_USB_OTG_SWITCH] =             { 210, 125, 82, 1 },
207 +       [QCOM_RPM_HDMI_SWITCH] =                { 211, 126, 83, 1 },
208 +       [QCOM_RPM_DDR_DMM] =                    { 212, 127, 84, 2 },
209 +       [QCOM_RPM_VDDMIN_GPIO] =                { 215, 131, 89, 1 },
210 +};
211 +
212 +static const struct qcom_rpm_data apq8064_template = {
213 +       .version = 3,
214 +       .resource_table = apq8064_rpm_resource_table,
215 +       .n_resources = ARRAY_SIZE(apq8064_rpm_resource_table),
216 +};
217 +
218 +static const struct qcom_rpm_resource msm8660_rpm_resource_table[] = {
219 +       [QCOM_RPM_CXO_CLK] =                    { 32, 12, 5, 1 },
220 +       [QCOM_RPM_PXO_CLK] =                    { 33, 13, 6, 1 },
221 +       [QCOM_RPM_PLL_4] =                      { 34, 14, 7, 1 },
222 +       [QCOM_RPM_APPS_FABRIC_CLK] =            { 35, 15, 8, 1 },
223 +       [QCOM_RPM_SYS_FABRIC_CLK] =             { 36, 16, 9, 1 },
224 +       [QCOM_RPM_MM_FABRIC_CLK] =              { 37, 17, 10, 1 },
225 +       [QCOM_RPM_DAYTONA_FABRIC_CLK] =         { 38, 18, 11, 1 },
226 +       [QCOM_RPM_SFPB_CLK] =                   { 39, 19, 12, 1 },
227 +       [QCOM_RPM_CFPB_CLK] =                   { 40, 20, 13, 1 },
228 +       [QCOM_RPM_MMFPB_CLK] =                  { 41, 21, 14, 1 },
229 +       [QCOM_RPM_SMI_CLK] =                    { 42, 22, 15, 1 },
230 +       [QCOM_RPM_EBI1_CLK] =                   { 43, 23, 16, 1 },
231 +       [QCOM_RPM_APPS_L2_CACHE_CTL] =          { 44, 24, 17, 1 },
232 +       [QCOM_RPM_APPS_FABRIC_HALT] =           { 45, 25, 18, 2 },
233 +       [QCOM_RPM_APPS_FABRIC_MODE] =           { 47, 26, 19, 3 },
234 +       [QCOM_RPM_APPS_FABRIC_ARB] =            { 51, 28, 21, 6 },
235 +       [QCOM_RPM_SYS_FABRIC_HALT] =            { 63, 29, 22, 2 },
236 +       [QCOM_RPM_SYS_FABRIC_MODE] =            { 65, 30, 23, 3 },
237 +       [QCOM_RPM_SYS_FABRIC_ARB] =             { 69, 32, 25, 22 },
238 +       [QCOM_RPM_MM_FABRIC_HALT] =             { 105, 33, 26, 2 },
239 +       [QCOM_RPM_MM_FABRIC_MODE] =             { 107, 34, 27, 3 },
240 +       [QCOM_RPM_MM_FABRIC_ARB] =              { 111, 36, 29, 23 },
241 +       [QCOM_RPM_PM8901_SMPS0] =               { 134, 37, 30, 2 },
242 +       [QCOM_RPM_PM8901_SMPS1] =               { 136, 39, 31, 2 },
243 +       [QCOM_RPM_PM8901_SMPS2] =               { 138, 41, 32, 2 },
244 +       [QCOM_RPM_PM8901_SMPS3] =               { 140, 43, 33, 2 },
245 +       [QCOM_RPM_PM8901_SMPS4] =               { 142, 45, 34, 2 },
246 +       [QCOM_RPM_PM8901_LDO0] =                { 144, 47, 35, 2 },
247 +       [QCOM_RPM_PM8901_LDO1] =                { 146, 49, 36, 2 },
248 +       [QCOM_RPM_PM8901_LDO2] =                { 148, 51, 37, 2 },
249 +       [QCOM_RPM_PM8901_LDO3] =                { 150, 53, 38, 2 },
250 +       [QCOM_RPM_PM8901_LDO4] =                { 152, 55, 39, 2 },
251 +       [QCOM_RPM_PM8901_LDO5] =                { 154, 57, 40, 2 },
252 +       [QCOM_RPM_PM8901_LDO6] =                { 156, 59, 41, 2 },
253 +       [QCOM_RPM_PM8901_LVS0] =                { 158, 61, 42, 1 },
254 +       [QCOM_RPM_PM8901_LVS1] =                { 159, 62, 43, 1 },
255 +       [QCOM_RPM_PM8901_LVS2] =                { 160, 63, 44, 1 },
256 +       [QCOM_RPM_PM8901_LVS3] =                { 161, 64, 45, 1 },
257 +       [QCOM_RPM_PM8901_MVS] =                 { 162, 65, 46, 1 },
258 +       [QCOM_RPM_PM8058_SMPS0] =               { 163, 66, 47, 2 },
259 +       [QCOM_RPM_PM8058_SMPS1] =               { 165, 68, 48, 2 },
260 +       [QCOM_RPM_PM8058_SMPS2] =               { 167, 70, 49, 2 },
261 +       [QCOM_RPM_PM8058_SMPS3] =               { 169, 72, 50, 2 },
262 +       [QCOM_RPM_PM8058_SMPS4] =               { 171, 74, 51, 2 },
263 +       [QCOM_RPM_PM8058_LDO0] =                { 173, 76, 52, 2 },
264 +       [QCOM_RPM_PM8058_LDO1] =                { 175, 78, 53, 2 },
265 +       [QCOM_RPM_PM8058_LDO2] =                { 177, 80, 54, 2 },
266 +       [QCOM_RPM_PM8058_LDO3] =                { 179, 82, 55, 2 },
267 +       [QCOM_RPM_PM8058_LDO4] =                { 181, 84, 56, 2 },
268 +       [QCOM_RPM_PM8058_LDO5] =                { 183, 86, 57, 2 },
269 +       [QCOM_RPM_PM8058_LDO6] =                { 185, 88, 58, 2 },
270 +       [QCOM_RPM_PM8058_LDO7] =                { 187, 90, 59, 2 },
271 +       [QCOM_RPM_PM8058_LDO8] =                { 189, 92, 60, 2 },
272 +       [QCOM_RPM_PM8058_LDO9] =                { 191, 94, 61, 2 },
273 +       [QCOM_RPM_PM8058_LDO10] =               { 193, 96, 62, 2 },
274 +       [QCOM_RPM_PM8058_LDO11] =               { 195, 98, 63, 2 },
275 +       [QCOM_RPM_PM8058_LDO12] =               { 197, 100, 64, 2 },
276 +       [QCOM_RPM_PM8058_LDO13] =               { 199, 102, 65, 2 },
277 +       [QCOM_RPM_PM8058_LDO14] =               { 201, 104, 66, 2 },
278 +       [QCOM_RPM_PM8058_LDO15] =               { 203, 106, 67, 2 },
279 +       [QCOM_RPM_PM8058_LDO16] =               { 205, 108, 68, 2 },
280 +       [QCOM_RPM_PM8058_LDO17] =               { 207, 110, 69, 2 },
281 +       [QCOM_RPM_PM8058_LDO18] =               { 209, 112, 70, 2 },
282 +       [QCOM_RPM_PM8058_LDO19] =               { 211, 114, 71, 2 },
283 +       [QCOM_RPM_PM8058_LDO20] =               { 213, 116, 72, 2 },
284 +       [QCOM_RPM_PM8058_LDO21] =               { 215, 118, 73, 2 },
285 +       [QCOM_RPM_PM8058_LDO22] =               { 217, 120, 74, 2 },
286 +       [QCOM_RPM_PM8058_LDO23] =               { 219, 122, 75, 2 },
287 +       [QCOM_RPM_PM8058_LDO24] =               { 221, 124, 76, 2 },
288 +       [QCOM_RPM_PM8058_LDO25] =               { 223, 126, 77, 2 },
289 +       [QCOM_RPM_PM8058_LVS0] =                { 225, 128, 78, 1 },
290 +       [QCOM_RPM_PM8058_LVS1] =                { 226, 129, 79, 1 },
291 +       [QCOM_RPM_PM8058_NCP] =                 { 227, 130, 80, 2 },
292 +       [QCOM_RPM_CXO_BUFFERS] =                { 229, 132, 81, 1 },
293 +};
294 +
295 +static const struct qcom_rpm_data msm8660_template = {
296 +       .version = 2,
297 +       .resource_table = msm8660_rpm_resource_table,
298 +       .n_resources = ARRAY_SIZE(msm8660_rpm_resource_table),
299 +};
300 +
301 +static const struct qcom_rpm_resource msm8960_rpm_resource_table[] = {
302 +       [QCOM_RPM_CXO_CLK] =                    { 25, 9, 5, 1 },
303 +       [QCOM_RPM_PXO_CLK] =                    { 26, 10, 6, 1 },
304 +       [QCOM_RPM_APPS_FABRIC_CLK] =            { 27, 11, 8, 1 },
305 +       [QCOM_RPM_SYS_FABRIC_CLK] =             { 28, 12, 9, 1 },
306 +       [QCOM_RPM_MM_FABRIC_CLK] =              { 29, 13, 10, 1 },
307 +       [QCOM_RPM_DAYTONA_FABRIC_CLK] =         { 30, 14, 11, 1 },
308 +       [QCOM_RPM_SFPB_CLK] =                   { 31, 15, 12, 1 },
309 +       [QCOM_RPM_CFPB_CLK] =                   { 32, 16, 13, 1 },
310 +       [QCOM_RPM_MMFPB_CLK] =                  { 33, 17, 14, 1 },
311 +       [QCOM_RPM_EBI1_CLK] =                   { 34, 18, 16, 1 },
312 +       [QCOM_RPM_APPS_FABRIC_HALT] =           { 35, 19, 18, 1 },
313 +       [QCOM_RPM_APPS_FABRIC_MODE] =           { 37, 20, 19, 1 },
314 +       [QCOM_RPM_APPS_FABRIC_IOCTL] =          { 40, 21, 20, 1 },
315 +       [QCOM_RPM_APPS_FABRIC_ARB] =            { 41, 22, 21, 12 },
316 +       [QCOM_RPM_SYS_FABRIC_HALT] =            { 53, 23, 22, 1 },
317 +       [QCOM_RPM_SYS_FABRIC_MODE] =            { 55, 24, 23, 1 },
318 +       [QCOM_RPM_SYS_FABRIC_IOCTL] =           { 58, 25, 24, 1 },
319 +       [QCOM_RPM_SYS_FABRIC_ARB] =             { 59, 26, 25, 29 },
320 +       [QCOM_RPM_MM_FABRIC_HALT] =             { 88, 27, 26, 1 },
321 +       [QCOM_RPM_MM_FABRIC_MODE] =             { 90, 28, 27, 1 },
322 +       [QCOM_RPM_MM_FABRIC_IOCTL] =            { 93, 29, 28, 1 },
323 +       [QCOM_RPM_MM_FABRIC_ARB] =              { 94, 30, 29, 23 },
324 +       [QCOM_RPM_PM8921_SMPS1] =               { 117, 31, 30, 2 },
325 +       [QCOM_RPM_PM8921_SMPS2] =               { 119, 33, 31, 2 },
326 +       [QCOM_RPM_PM8921_SMPS3] =               { 121, 35, 32, 2 },
327 +       [QCOM_RPM_PM8921_SMPS4] =               { 123, 37, 33, 2 },
328 +       [QCOM_RPM_PM8921_SMPS5] =               { 125, 39, 34, 2 },
329 +       [QCOM_RPM_PM8921_SMPS6] =               { 127, 41, 35, 2 },
330 +       [QCOM_RPM_PM8921_SMPS7] =               { 129, 43, 36, 2 },
331 +       [QCOM_RPM_PM8921_SMPS8] =               { 131, 45, 37, 2 },
332 +       [QCOM_RPM_PM8921_LDO1] =                { 133, 47, 38, 2 },
333 +       [QCOM_RPM_PM8921_LDO2] =                { 135, 49, 39, 2 },
334 +       [QCOM_RPM_PM8921_LDO3] =                { 137, 51, 40, 2 },
335 +       [QCOM_RPM_PM8921_LDO4] =                { 139, 53, 41, 2 },
336 +       [QCOM_RPM_PM8921_LDO5] =                { 141, 55, 42, 2 },
337 +       [QCOM_RPM_PM8921_LDO6] =                { 143, 57, 43, 2 },
338 +       [QCOM_RPM_PM8921_LDO7] =                { 145, 59, 44, 2 },
339 +       [QCOM_RPM_PM8921_LDO8] =                { 147, 61, 45, 2 },
340 +       [QCOM_RPM_PM8921_LDO9] =                { 149, 63, 46, 2 },
341 +       [QCOM_RPM_PM8921_LDO10] =               { 151, 65, 47, 2 },
342 +       [QCOM_RPM_PM8921_LDO11] =               { 153, 67, 48, 2 },
343 +       [QCOM_RPM_PM8921_LDO12] =               { 155, 69, 49, 2 },
344 +       [QCOM_RPM_PM8921_LDO13] =               { 157, 71, 50, 2 },
345 +       [QCOM_RPM_PM8921_LDO14] =               { 159, 73, 51, 2 },
346 +       [QCOM_RPM_PM8921_LDO15] =               { 161, 75, 52, 2 },
347 +       [QCOM_RPM_PM8921_LDO16] =               { 163, 77, 53, 2 },
348 +       [QCOM_RPM_PM8921_LDO17] =               { 165, 79, 54, 2 },
349 +       [QCOM_RPM_PM8921_LDO18] =               { 167, 81, 55, 2 },
350 +       [QCOM_RPM_PM8921_LDO19] =               { 169, 83, 56, 2 },
351 +       [QCOM_RPM_PM8921_LDO20] =               { 171, 85, 57, 2 },
352 +       [QCOM_RPM_PM8921_LDO21] =               { 173, 87, 58, 2 },
353 +       [QCOM_RPM_PM8921_LDO22] =               { 175, 89, 59, 2 },
354 +       [QCOM_RPM_PM8921_LDO23] =               { 177, 91, 60, 2 },
355 +       [QCOM_RPM_PM8921_LDO24] =               { 179, 93, 61, 2 },
356 +       [QCOM_RPM_PM8921_LDO25] =               { 181, 95, 62, 2 },
357 +       [QCOM_RPM_PM8921_LDO26] =               { 183, 97, 63, 2 },
358 +       [QCOM_RPM_PM8921_LDO27] =               { 185, 99, 64, 2 },
359 +       [QCOM_RPM_PM8921_LDO28] =               { 187, 101, 65, 2 },
360 +       [QCOM_RPM_PM8921_LDO29] =               { 189, 103, 66, 2 },
361 +       [QCOM_RPM_PM8921_CLK1] =                { 191, 105, 67, 2 },
362 +       [QCOM_RPM_PM8921_CLK2] =                { 193, 107, 68, 2 },
363 +       [QCOM_RPM_PM8921_LVS1] =                { 195, 109, 69, 1 },
364 +       [QCOM_RPM_PM8921_LVS2] =                { 196, 110, 70, 1 },
365 +       [QCOM_RPM_PM8921_LVS3] =                { 197, 111, 71, 1 },
366 +       [QCOM_RPM_PM8921_LVS4] =                { 198, 112, 72, 1 },
367 +       [QCOM_RPM_PM8921_LVS5] =                { 199, 113, 73, 1 },
368 +       [QCOM_RPM_PM8921_LVS6] =                { 200, 114, 74, 1 },
369 +       [QCOM_RPM_PM8921_LVS7] =                { 201, 115, 75, 1 },
370 +       [QCOM_RPM_PM8921_NCP] =                 { 202, 116, 80, 2 },
371 +       [QCOM_RPM_CXO_BUFFERS] =                { 204, 118, 81, 1 },
372 +       [QCOM_RPM_USB_OTG_SWITCH] =             { 205, 119, 82, 1 },
373 +       [QCOM_RPM_HDMI_SWITCH] =                { 206, 120, 83, 1 },
374 +       [QCOM_RPM_DDR_DMM] =                    { 207, 121, 84, 2 },
375 +};
376 +
377 +static const struct qcom_rpm_data msm8960_template = {
378 +       .version = 3,
379 +       .resource_table = msm8960_rpm_resource_table,
380 +       .n_resources = ARRAY_SIZE(msm8960_rpm_resource_table),
381 +};
382 +
383 +static const struct of_device_id qcom_rpm_of_match[] = {
384 +       { .compatible = "qcom,rpm-apq8064", .data = &apq8064_template },
385 +       { .compatible = "qcom,rpm-msm8660", .data = &msm8660_template },
386 +       { .compatible = "qcom,rpm-msm8960", .data = &msm8960_template },
387 +       { }
388 +};
389 +MODULE_DEVICE_TABLE(of, qcom_rpm_of_match);
390 +
391 +int qcom_rpm_write(struct qcom_rpm *rpm,
392 +                  int state,
393 +                  int resource,
394 +                  u32 *buf, size_t count)
395 +{
396 +       const struct qcom_rpm_resource *res;
397 +       const struct qcom_rpm_data *data = rpm->data;
398 +       u32 sel_mask[RPM_SELECT_SIZE] = { 0 };
399 +       int left;
400 +       int ret = 0;
401 +       int i;
402 +
403 +       if (WARN_ON(resource < 0 || resource >= data->n_resources))
404 +               return -EINVAL;
405 +
406 +       res = &data->resource_table[resource];
407 +       if (WARN_ON(res->size != count))
408 +               return -EINVAL;
409 +
410 +       mutex_lock(&rpm->lock);
411 +
412 +       for (i = 0; i < res->size; i++)
413 +               writel_relaxed(buf[i], RPM_REQ_REG(rpm, res->target_id + i));
414 +
415 +       bitmap_set((unsigned long *)sel_mask, res->select_id, 1);
416 +       for (i = 0; i < ARRAY_SIZE(sel_mask); i++) {
417 +               writel_relaxed(sel_mask[i],
418 +                              RPM_CTRL_REG(rpm, RPM_REQ_SELECT + i));
419 +       }
420 +
421 +       writel_relaxed(BIT(state), RPM_CTRL_REG(rpm, RPM_REQUEST_CONTEXT));
422 +
423 +       reinit_completion(&rpm->ack);
424 +       regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
425 +
426 +       left = wait_for_completion_timeout(&rpm->ack, RPM_REQUEST_TIMEOUT);
427 +       if (!left)
428 +               ret = -ETIMEDOUT;
429 +       else if (rpm->ack_status & RPM_REJECTED)
430 +               ret = -EIO;
431 +
432 +       mutex_unlock(&rpm->lock);
433 +
434 +       return ret;
435 +}
436 +EXPORT_SYMBOL(qcom_rpm_write);
437 +
438 +static irqreturn_t qcom_rpm_ack_interrupt(int irq, void *dev)
439 +{
440 +       struct qcom_rpm *rpm = dev;
441 +       u32 ack;
442 +       int i;
443 +
444 +       ack = readl_relaxed(RPM_CTRL_REG(rpm, RPM_ACK_CONTEXT));
445 +       for (i = 0; i < RPM_SELECT_SIZE; i++)
446 +               writel_relaxed(0, RPM_CTRL_REG(rpm, RPM_ACK_SELECTOR + i));
447 +       writel(0, RPM_CTRL_REG(rpm, RPM_ACK_CONTEXT));
448 +
449 +       if (ack & RPM_NOTIFICATION) {
450 +               dev_warn(rpm->dev, "ignoring notification!\n");
451 +       } else {
452 +               rpm->ack_status = ack;
453 +               complete(&rpm->ack);
454 +       }
455 +
456 +       return IRQ_HANDLED;
457 +}
458 +
459 +static irqreturn_t qcom_rpm_err_interrupt(int irq, void *dev)
460 +{
461 +       struct qcom_rpm *rpm = dev;
462 +
463 +       regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
464 +       dev_err(rpm->dev, "RPM triggered fatal error\n");
465 +
466 +       return IRQ_HANDLED;
467 +}
468 +
469 +static irqreturn_t qcom_rpm_wakeup_interrupt(int irq, void *dev)
470 +{
471 +       return IRQ_HANDLED;
472 +}
473 +
474 +static int qcom_rpm_probe(struct platform_device *pdev)
475 +{
476 +       const struct of_device_id *match;
477 +       struct device_node *syscon_np;
478 +       struct resource *res;
479 +       struct qcom_rpm *rpm;
480 +       u32 fw_version[3];
481 +       int irq_wakeup;
482 +       int irq_ack;
483 +       int irq_err;
484 +       int ret;
485 +
486 +       rpm = devm_kzalloc(&pdev->dev, sizeof(*rpm), GFP_KERNEL);
487 +       if (!rpm)
488 +               return -ENOMEM;
489 +
490 +       rpm->dev = &pdev->dev;
491 +       mutex_init(&rpm->lock);
492 +       init_completion(&rpm->ack);
493 +
494 +       irq_ack = platform_get_irq_byname(pdev, "ack");
495 +       if (irq_ack < 0) {
496 +               dev_err(&pdev->dev, "required ack interrupt missing\n");
497 +               return irq_ack;
498 +       }
499 +
500 +       irq_err = platform_get_irq_byname(pdev, "err");
501 +       if (irq_err < 0) {
502 +               dev_err(&pdev->dev, "required err interrupt missing\n");
503 +               return irq_err;
504 +       }
505 +
506 +       irq_wakeup = platform_get_irq_byname(pdev, "wakeup");
507 +       if (irq_wakeup < 0) {
508 +               dev_err(&pdev->dev, "required wakeup interrupt missing\n");
509 +               return irq_wakeup;
510 +       }
511 +
512 +       match = of_match_device(qcom_rpm_of_match, &pdev->dev);
513 +       rpm->data = match->data;
514 +
515 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
516 +       rpm->status_regs = devm_ioremap_resource(&pdev->dev, res);
517 +       if (IS_ERR(rpm->status_regs))
518 +               return PTR_ERR(rpm->status_regs);
519 +       rpm->ctrl_regs = rpm->status_regs + 0x400;
520 +       rpm->req_regs = rpm->status_regs + 0x600;
521 +
522 +       syscon_np = of_parse_phandle(pdev->dev.of_node, "qcom,ipc", 0);
523 +       if (!syscon_np) {
524 +               dev_err(&pdev->dev, "no qcom,ipc node\n");
525 +               return -ENODEV;
526 +       }
527 +
528 +       rpm->ipc_regmap = syscon_node_to_regmap(syscon_np);
529 +       if (IS_ERR(rpm->ipc_regmap))
530 +               return PTR_ERR(rpm->ipc_regmap);
531 +
532 +       ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 1,
533 +                                        &rpm->ipc_offset);
534 +       if (ret < 0) {
535 +               dev_err(&pdev->dev, "no offset in qcom,ipc\n");
536 +               return -EINVAL;
537 +       }
538 +
539 +       ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 2,
540 +                                        &rpm->ipc_bit);
541 +       if (ret < 0) {
542 +               dev_err(&pdev->dev, "no bit in qcom,ipc\n");
543 +               return -EINVAL;
544 +       }
545 +
546 +       dev_set_drvdata(&pdev->dev, rpm);
547 +
548 +       fw_version[0] = readl(RPM_STATUS_REG(rpm, 0));
549 +       fw_version[1] = readl(RPM_STATUS_REG(rpm, 1));
550 +       fw_version[2] = readl(RPM_STATUS_REG(rpm, 2));
551 +       if (fw_version[0] != rpm->data->version) {
552 +               dev_err(&pdev->dev,
553 +                       "RPM version %u.%u.%u incompatible with driver version %u",
554 +                       fw_version[0],
555 +                       fw_version[1],
556 +                       fw_version[2],
557 +                       rpm->data->version);
558 +               return -EFAULT;
559 +       }
560 +
561 +       dev_info(&pdev->dev, "RPM firmware %u.%u.%u\n", fw_version[0],
562 +                                                       fw_version[1],
563 +                                                       fw_version[2]);
564 +
565 +       ret = devm_request_irq(&pdev->dev,
566 +                              irq_ack,
567 +                              qcom_rpm_ack_interrupt,
568 +                              IRQF_TRIGGER_RISING | IRQF_NO_SUSPEND,
569 +                              "qcom_rpm_ack",
570 +                              rpm);
571 +       if (ret) {
572 +               dev_err(&pdev->dev, "failed to request ack interrupt\n");
573 +               return ret;
574 +       }
575 +
576 +       ret = irq_set_irq_wake(irq_ack, 1);
577 +       if (ret)
578 +               dev_warn(&pdev->dev, "failed to mark ack irq as wakeup\n");
579 +
580 +       ret = devm_request_irq(&pdev->dev,
581 +                              irq_err,
582 +                              qcom_rpm_err_interrupt,
583 +                              IRQF_TRIGGER_RISING,
584 +                              "qcom_rpm_err",
585 +                              rpm);
586 +       if (ret) {
587 +               dev_err(&pdev->dev, "failed to request err interrupt\n");
588 +               return ret;
589 +       }
590 +
591 +       ret = devm_request_irq(&pdev->dev,
592 +                              irq_wakeup,
593 +                              qcom_rpm_wakeup_interrupt,
594 +                              IRQF_TRIGGER_RISING,
595 +                              "qcom_rpm_wakeup",
596 +                              rpm);
597 +       if (ret) {
598 +               dev_err(&pdev->dev, "failed to request wakeup interrupt\n");
599 +               return ret;
600 +       }
601 +
602 +       ret = irq_set_irq_wake(irq_wakeup, 1);
603 +       if (ret)
604 +               dev_warn(&pdev->dev, "failed to mark wakeup irq as wakeup\n");
605 +
606 +       return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
607 +}
608 +
609 +static int qcom_rpm_remove(struct platform_device *pdev)
610 +{
611 +       of_platform_depopulate(&pdev->dev);
612 +       return 0;
613 +}
614 +
615 +static struct platform_driver qcom_rpm_driver = {
616 +       .probe = qcom_rpm_probe,
617 +       .remove = qcom_rpm_remove,
618 +       .driver  = {
619 +               .name  = "qcom_rpm",
620 +               .of_match_table = qcom_rpm_of_match,
621 +       },
622 +};
623 +
624 +static int __init qcom_rpm_init(void)
625 +{
626 +       return platform_driver_register(&qcom_rpm_driver);
627 +}
628 +arch_initcall(qcom_rpm_init);
629 +
630 +static void __exit qcom_rpm_exit(void)
631 +{
632 +       platform_driver_unregister(&qcom_rpm_driver);
633 +}
634 +module_exit(qcom_rpm_exit)
635 +
636 +MODULE_DESCRIPTION("Qualcomm Resource Power Manager driver");
637 +MODULE_LICENSE("GPL v2");
638 +MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
639 --- /dev/null
640 +++ b/include/linux/mfd/qcom_rpm.h
641 @@ -0,0 +1,13 @@
642 +#ifndef __QCOM_RPM_H__
643 +#define __QCOM_RPM_H__
644 +
645 +#include <linux/types.h>
646 +
647 +struct qcom_rpm;
648 +
649 +#define QCOM_RPM_ACTIVE_STATE  0
650 +#define QCOM_RPM_SLEEP_STATE   1
651 +
652 +int qcom_rpm_write(struct qcom_rpm *rpm, int state, int resource, u32 *buf, size_t count);
653 +
654 +#endif