1 From 331294fa5c703536e27b79e9c112d162393f725a Mon Sep 17 00:00:00 2001
2 From: Andy Gross <agross@codeaurora.org>
3 Date: Thu, 26 Jun 2014 13:55:10 -0500
4 Subject: [PATCH 178/182] dmaengine: qcom_adm: Add device tree binding
6 Add device tree binding support for the QCOM ADM DMA driver.
8 Signed-off-by: Andy Gross <agross@codeaurora.org>
10 Documentation/devicetree/bindings/dma/qcom_adm.txt | 60 ++++++++++++++++++++
11 1 file changed, 60 insertions(+)
12 create mode 100644 Documentation/devicetree/bindings/dma/qcom_adm.txt
15 +++ b/Documentation/devicetree/bindings/dma/qcom_adm.txt
17 +QCOM ADM DMA Controller
20 +- compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960
21 +- reg: Address range for DMA registers
22 +- interrupts: Should contain one interrupt shared by all channels
23 +- #dma-cells: must be <2>. First cell denotes the channel number. Second cell
24 + denotes CRCI (client rate control interface) flow control assignment.
25 +- clocks: Should contain the core clock and interface clock.
26 +- clock-names: Must contain "core" for the core clock and "iface" for the
28 +- resets: Must contain an entry for each entry in reset names.
29 +- reset-names: Must include the following entries:
34 +- qcom,ee: indicates the security domain identifier used in the secure world.
37 + adm_dma: dma@18300000 {
38 + compatible = "qcom,adm";
39 + reg = <0x18300000 0x100000>;
40 + interrupts = <0 170 0>;
43 + clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
44 + clock-names = "core", "iface";
46 + resets = <&gcc ADM0_RESET>,
47 + <&gcc ADM0_C0_RESET>,
48 + <&gcc ADM0_C1_RESET>,
49 + <&gcc ADM0_C2_RESET>;
50 + reset-names = "clk", "c0", "c1", "c2";
54 +DMA clients must use the format descripted in the dma.txt file, using a three
55 +cell specifier for each channel.
57 +Each dmas request consists of 3 cells:
58 + 1. phandle pointing to the DMA controller
60 + 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0.
64 + spi4: spi@1a280000 {
66 + spi-max-frequency = <50000000>;
68 + pinctrl-0 = <&spi_pins>;
69 + pinctrl-names = "default";
71 + cs-gpios = <&qcom_pinmux 20 0>;
73 + dmas = <&adm_dma 6 9>,
75 + dma-names = "rx", "tx";