kernel: update 3.14 to 3.14.18
[15.05/openwrt.git] / target / linux / ipq806x / patches / 0155-clk-qcom-Fix-incorrect-UTMI-DT-include-values.patch
1 From 9ab5cb48696dca02bf43170b50d1034a96fb9e85 Mon Sep 17 00:00:00 2001
2 From: Andy Gross <agross@codeaurora.org>
3 Date: Sun, 15 Jun 2014 00:39:57 -0500
4 Subject: [PATCH 155/182] clk: qcom: Fix incorrect UTMI DT include values
5
6 Corrected values for UTMI clock definitions.
7
8 Signed-off-by: Andy Gross <agross@codeaurora.org>
9 ---
10  include/dt-bindings/clock/qcom,gcc-ipq806x.h |   38 +++++++++++++-------------
11  1 file changed, 19 insertions(+), 19 deletions(-)
12
13 --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
14 +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
15 @@ -273,24 +273,24 @@
16  #define USB30_SLEEP_CLK                                262
17  #define USB30_UTMI_SRC                         263
18  #define USB30_0_UTMI_CLK                       264
19 -#define USB30_1_UTMI_CLK                       264
20 -#define USB30_MASTER_SRC                       265
21 -#define USB30_0_MASTER_CLK                     266
22 -#define USB30_1_MASTER_CLK                     267
23 -#define GMAC_CORE1_CLK_SRC                     268
24 -#define GMAC_CORE2_CLK_SRC                     269
25 -#define GMAC_CORE3_CLK_SRC                     270
26 -#define GMAC_CORE4_CLK_SRC                     271
27 -#define GMAC_CORE1_CLK                         272
28 -#define GMAC_CORE2_CLK                         273
29 -#define GMAC_CORE3_CLK                         274
30 -#define GMAC_CORE4_CLK                         275
31 -#define UBI32_CORE1_CLK_SRC                    276
32 -#define UBI32_CORE2_CLK_SRC                    277
33 -#define UBI32_CORE1_CLK                                278
34 -#define UBI32_CORE2_CLK                                279
35 -#define NSSTCM_CLK_SRC                         280
36 -#define NSSTCM_CLK                             281
37 -#define NSS_CORE_CLK                           282 /* Virtual */
38 +#define USB30_1_UTMI_CLK                       265
39 +#define USB30_MASTER_SRC                       266
40 +#define USB30_0_MASTER_CLK                     267
41 +#define USB30_1_MASTER_CLK                     268
42 +#define GMAC_CORE1_CLK_SRC                     269
43 +#define GMAC_CORE2_CLK_SRC                     270
44 +#define GMAC_CORE3_CLK_SRC                     271
45 +#define GMAC_CORE4_CLK_SRC                     272
46 +#define GMAC_CORE1_CLK                         273
47 +#define GMAC_CORE2_CLK                         274
48 +#define GMAC_CORE3_CLK                         275
49 +#define GMAC_CORE4_CLK                         276
50 +#define UBI32_CORE1_CLK_SRC                    277
51 +#define UBI32_CORE2_CLK_SRC                    278
52 +#define UBI32_CORE1_CLK                                279
53 +#define UBI32_CORE2_CLK                                280
54 +#define NSSTCM_CLK_SRC                         281
55 +#define NSSTCM_CLK                             282
56 +#define NSS_CORE_CLK                           283 /* Virtual */
57  
58  #endif