target/linux/ipq806x/patches/0146-ARM-dts-qcom-Add-SATA-support-for-IPQ8064-and-AP148-.patch

   1 From 6992cf3e8900d042a845eafc11e7841f32fec0a6 Mon Sep 17 00:00:00 2001
   2 From: Kumar Gala <galak@codeaurora.org>
   3 Date: Thu, 12 Jun 2014 10:56:54 -0500
   4 Subject: [PATCH 146/182] ARM: dts: qcom: Add SATA support for IPQ8064 and
   5  AP148 board
   6
   7 ---
   8  arch/arm/boot/dts/qcom-ipq8064-ap148.dts |    8 ++++++++
   9  arch/arm/boot/dts/qcom-ipq8064.dtsi      |   30 ++++++++++++++++++++++++++++++
  10  2 files changed, 38 insertions(+)
  11
  12 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
  13 +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
  14 @@ -118,5 +118,13 @@
  15                                   0x81000000 0 0          0x31e00000 0 0x00100000   /* downstream I/O */
  16                                   0x82000000 0 0x00000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
  17                 };
  18 +
  19 +               sata-phy@1b400000 {
  20 +                       status = "ok";
  21 +               };
  22 +
  23 +               sata@29000000 {
  24 +                       status = "ok";
  25 +               };
  26         };
  27  };
  28 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
  29 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
  30 @@ -339,5 +339,35 @@
  31                         clock-names = "core", "iface", "phy";
  32                         status = "disabled";
  33                 };
  34 +
  35 +               sata_phy: sata-phy@1b400000 {
  36 +                       compatible = "qcom,ipq806x-sata-phy";
  37 +                       reg = <0x1b400000 0x200>;
  38 +
  39 +                       clocks = <&gcc SATA_PHY_CFG_CLK>;
  40 +                       clock-names = "cfg";
  41 +
  42 +                       #phy-cells = <0>;
  43 +                       status = "disabled";
  44 +               };
  45 +
  46 +               sata@29000000 {
  47 +                       compatible = "qcom,ipq806x-ahci", "qcom,msm-ahci";
  48 +                       reg = <0x29000000 0x180>;
  49 +
  50 +                       interrupts = <0 209 0x0>;
  51 +
  52 +                       clocks = <&gcc SFAB_SATA_S_H_CLK>,
  53 +                                <&gcc SATA_H_CLK>,
  54 +                                <&gcc SATA_A_CLK>,
  55 +                                <&gcc SATA_RXOOB_CLK>,
  56 +                                <&gcc SATA_PMALIVE_CLK>;
  57 +                       clock-names = "slave_face", "iface", "core",
  58 +                                       "rxoob", "pmalive";
  59 +
  60 +                       phys = <&sata_phy>;
  61 +                       phy-names = "sata-phy";
  62 +                       status = "disabled";
  63 +               };
  64         };
  65  };