1 From 63495b04141e60ceb40d4632a41b7cd4a3d23dd2 Mon Sep 17 00:00:00 2001
2 From: Kumar Gala <galak@codeaurora.org>
3 Date: Wed, 28 May 2014 12:01:29 -0500
4 Subject: [PATCH 091/182] ARM: dts: qcom: Update msm8974/apq8074 device trees
6 * Move SoC peripherals into an SoC container node
7 * Move serial enabling into board file (qcom-apq8074-dragonboard.dts)
8 * Move spi pinctrl into board file
9 * Cleanup cpu node to match binding spec, enable-method and compatible
10 should be per cpu, not part of the container
11 * Drop interrupts property from l2-cache node as its not part of the
13 * Move timer node out of SoC container
15 Signed-off-by: Kumar Gala <galak@codeaurora.org>
17 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 28 +++++++++++++-
18 arch/arm/boot/dts/qcom-msm8974.dtsi | 49 +++++++++---------------
19 2 files changed, 45 insertions(+), 32 deletions(-)
21 diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
22 index 92320c4..b4dfb01 100644
23 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
24 +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
26 model = "Qualcomm APQ8074 Dragonboard";
27 compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
39 cd-gpios = <&msmgpio 62 0x1>;
45 + spi8_default: spi8_default {
48 + function = "blsp_spi8";
52 + function = "blsp_spi8";
56 + function = "blsp_spi8";
60 + function = "blsp_spi8";
66 diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
67 index c530a33..69dca2a 100644
68 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi
69 +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
73 interrupts = <1 9 0xf04>;
74 - compatible = "qcom,krait";
75 - enable-method = "qcom,kpss-acc-v2";
78 + compatible = "qcom,krait";
79 + enable-method = "qcom,kpss-acc-v2";
82 next-level-cache = <&L2>;
87 + compatible = "qcom,krait";
88 + enable-method = "qcom,kpss-acc-v2";
91 next-level-cache = <&L2>;
96 + compatible = "qcom,krait";
97 + enable-method = "qcom,kpss-acc-v2";
100 next-level-cache = <&L2>;
105 + compatible = "qcom,krait";
106 + enable-method = "qcom,kpss-acc-v2";
109 next-level-cache = <&L2>;
112 compatible = "cache";
114 - interrupts = <0 2 0x4>;
115 qcom,saw = <&saw_l2>;
119 interrupts = <1 7 0xf04>;
123 + compatible = "arm,armv7-timer";
124 + interrupts = <1 2 0xf08>,
128 + clock-frequency = <19200000>;
132 #address-cells = <1>;
139 - compatible = "arm,armv7-timer";
140 - interrupts = <1 2 0xf08>,
144 - clock-frequency = <19200000>;
148 #address-cells = <1>;
151 interrupts = <0 108 0x0>;
152 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
153 clock-names = "core", "iface";
154 + status = "disabled";
159 interrupt-controller;
160 #interrupt-cells = <2>;
161 interrupts = <0 208 0>;
163 - spi8_default: spi8_default {
166 - function = "blsp_spi8";
170 - function = "blsp_spi8";
174 - function = "blsp_spi8";
178 - function = "blsp_spi8";