target/linux/ipq806x/patches/0089-ARM-dts-MSM8974-Add-pinctrl-node.patch

   1 From b3a77c7cab10272988231482e2c654c5f10a910c Mon Sep 17 00:00:00 2001
   2 From: "Ivan T. Ivanov" <iivanov@mm-sol.com>
   3 Date: Thu, 6 Feb 2014 17:28:49 +0200
   4 Subject: [PATCH 089/182] ARM: dts: MSM8974: Add pinctrl node
   5
   6 Add the pin control node and pin definitions of SPI8.
   7
   8 Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
   9 Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
  10 Acked-by: Linus Walleij <linus.walleij@linaro.org>
  11 Signed-off-by: Kumar Gala <galak@codeaurora.org>
  12 ---
  13  arch/arm/boot/dts/qcom-msm8974.dtsi |   29 +++++++++++++++++++++++++++++
  14  1 file changed, 29 insertions(+)
  15
  16 diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
  17 index f687239..23aa387 100644
  18 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi
  19 +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
  20 @@ -198,5 +198,34 @@
  21                         clocks = <&gcc GCC_PRNG_AHB_CLK>;
  22                         clock-names = "core";
  23                 };
  24 +
  25 +               msmgpio: pinctrl@fd510000 {
  26 +                       compatible = "qcom,msm8974-pinctrl";
  27 +                       reg = <0xfd510000 0x4000>;
  28 +                       gpio-controller;
  29 +                       #gpio-cells = <2>;
  30 +                       interrupt-controller;
  31 +                       #interrupt-cells = <2>;
  32 +                       interrupts = <0 208 0>;
  33 +
  34 +                       spi8_default: spi8_default {
  35 +                               mosi {
  36 +                                       pins = "gpio45";
  37 +                                       function = "blsp_spi8";
  38 +                               };
  39 +                               miso {
  40 +                                       pins = "gpio46";
  41 +                                       function = "blsp_spi8";
  42 +                               };
  43 +                               cs {
  44 +                                       pins = "gpio47";
  45 +                                       function = "blsp_spi8";
  46 +                               };
  47 +                               clk {
  48 +                                       pins = "gpio48";
  49 +                                       function = "blsp_spi8";
  50 +                               };
  51 +                       };
  52 +               };
  53         };
  54  };
  55 --
  56 1.7.10.4
  57