d83d5d9696110df358bbecbe907fc138b2f8f6be
[15.05/openwrt.git] / target / linux / ipq806x / patches / 0079-clk-qcom-Add-basic-support-for-APQ8064-global-clock-.patch
1 From 0f171b8a6e1723f0ce6f98f8b3fba7d2583088c1 Mon Sep 17 00:00:00 2001
2 From: Kumar Gala <galak@codeaurora.org>
3 Date: Fri, 4 Apr 2014 11:31:29 -0500
4 Subject: [PATCH 079/182] clk: qcom: Add basic support for APQ8064 global
5  clock controller clocks
6
7 The APQ8064 and MSM8960 share a significant amount of clock data and
8 code between the two SoCs.  Rather than duplicating the data we just add
9 support for a unqiue APQ8064 clock table into the MSM8960 code.
10
11 For now add just enough clocks to get a basic serial port going on an
12 APQ8064 device.
13
14 Signed-off-by: Kumar Gala <galak@codeaurora.org>
15 Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
16 Signed-off-by: Mike Turquette <mturquette@linaro.org>
17 [mturquette@linaro.org: trivial conflict due to missing ipq8064 support]
18 ---
19  .../devicetree/bindings/clock/qcom,gcc.txt         |    1 +
20  drivers/clk/qcom/Kconfig                           |    4 +--
21  drivers/clk/qcom/gcc-msm8960.c                     |   30 ++++++++++++++++++--
22  3 files changed, 30 insertions(+), 5 deletions(-)
23
24 diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.txt b/Documentation/devicetree/bindings/clock/qcom,gcc.txt
25 index 767401f..7b7104e 100644
26 --- a/Documentation/devicetree/bindings/clock/qcom,gcc.txt
27 +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.txt
28 @@ -4,6 +4,7 @@ Qualcomm Global Clock & Reset Controller Binding
29  Required properties :
30  - compatible : shall contain only one of the following:
31  
32 +                       "qcom,gcc-apq8064"
33                         "qcom,gcc-msm8660"
34                         "qcom,gcc-msm8960"
35                         "qcom,gcc-msm8974"
36 diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
37 index 995bcfa..7f696b7 100644
38 --- a/drivers/clk/qcom/Kconfig
39 +++ b/drivers/clk/qcom/Kconfig
40 @@ -13,10 +13,10 @@ config MSM_GCC_8660
41           i2c, USB, SD/eMMC, etc.
42  
43  config MSM_GCC_8960
44 -       tristate "MSM8960 Global Clock Controller"
45 +       tristate "APQ8064/MSM8960 Global Clock Controller"
46         depends on COMMON_CLK_QCOM
47         help
48 -         Support for the global clock controller on msm8960 devices.
49 +         Support for the global clock controller on apq8064/msm8960 devices.
50           Say Y if you want to use peripheral devices such as UART, SPI,
51           i2c, USB, SD/eMMC, SATA, PCIe, etc.
52  
53 diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
54 index 633b019..8e2b6dd 100644
55 --- a/drivers/clk/qcom/gcc-msm8960.c
56 +++ b/drivers/clk/qcom/gcc-msm8960.c
57 @@ -1,5 +1,5 @@
58  /*
59 - * Copyright (c) 2013, The Linux Foundation. All rights reserved.
60 + * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
61   *
62   * This software is licensed under the terms of the GNU General Public
63   * License version 2, as published by the Free Software Foundation, and
64 @@ -2868,6 +2868,16 @@ static const struct qcom_reset_map gcc_msm8960_resets[] = {
65         [RIVA_RESET] = { 0x35e0 },
66  };
67  
68 +static struct clk_regmap *gcc_apq8064_clks[] = {
69 +       [PLL8] = &pll8.clkr,
70 +       [PLL8_VOTE] = &pll8_vote,
71 +       [GSBI7_UART_SRC] = &gsbi7_uart_src.clkr,
72 +       [GSBI7_UART_CLK] = &gsbi7_uart_clk.clkr,
73 +       [GSBI7_QUP_SRC] = &gsbi7_qup_src.clkr,
74 +       [GSBI7_QUP_CLK] = &gsbi7_qup_clk.clkr,
75 +       [GSBI7_H_CLK] = &gsbi7_h_clk.clkr,
76 +};
77 +
78  static const struct regmap_config gcc_msm8960_regmap_config = {
79         .reg_bits       = 32,
80         .reg_stride     = 4,
81 @@ -2884,8 +2894,17 @@ static const struct qcom_cc_desc gcc_msm8960_desc = {
82         .num_resets = ARRAY_SIZE(gcc_msm8960_resets),
83  };
84  
85 +static const struct qcom_cc_desc gcc_apq8064_desc = {
86 +       .config = &gcc_msm8960_regmap_config,
87 +       .clks = gcc_apq8064_clks,
88 +       .num_clks = ARRAY_SIZE(gcc_apq8064_clks),
89 +       .resets = gcc_msm8960_resets,
90 +       .num_resets = ARRAY_SIZE(gcc_msm8960_resets),
91 +};
92 +
93  static const struct of_device_id gcc_msm8960_match_table[] = {
94 -       { .compatible = "qcom,gcc-msm8960" },
95 +       { .compatible = "qcom,gcc-msm8960", .data = &gcc_msm8960_desc },
96 +       { .compatible = "qcom,gcc-apq8064", .data = &gcc_apq8064_desc },
97         { }
98  };
99  MODULE_DEVICE_TABLE(of, gcc_msm8960_match_table);
100 @@ -2894,6 +2913,11 @@ static int gcc_msm8960_probe(struct platform_device *pdev)
101  {
102         struct clk *clk;
103         struct device *dev = &pdev->dev;
104 +       const struct of_device_id *match;
105 +
106 +       match = of_match_device(gcc_msm8960_match_table, &pdev->dev);
107 +       if (!match)
108 +               return -EINVAL;
109  
110         /* Temporary until RPM clocks supported */
111         clk = clk_register_fixed_rate(dev, "cxo", NULL, CLK_IS_ROOT, 19200000);
112 @@ -2904,7 +2928,7 @@ static int gcc_msm8960_probe(struct platform_device *pdev)
113         if (IS_ERR(clk))
114                 return PTR_ERR(clk);
115  
116 -       return qcom_cc_probe(pdev, &gcc_msm8960_desc);
117 +       return qcom_cc_probe(pdev, match->data);
118  }
119  
120  static int gcc_msm8960_remove(struct platform_device *pdev)
121 -- 
122 1.7.10.4
123