target/linux/ipq806x/patches/0010-devicetree-bindings-Document-Krait-Scorpion-cpus-and.patch

   1 From 236d07c7bb0c758ea40ea0110d37306d2e7d9a4b Mon Sep 17 00:00:00 2001
   2 From: Rohit Vaswani <rvaswani@codeaurora.org>
   3 Date: Thu, 31 Oct 2013 17:26:33 -0700
   4 Subject: [PATCH 010/182] devicetree: bindings: Document Krait/Scorpion cpus
   5  and enable-method
   6
   7 Scorpion and Krait don't use the spin-table enable-method.
   8 Instead they rely on mmio register accesses to enable power and
   9 clocks to bring CPUs out of reset. Document their enable-methods.
  10
  11 Cc: <devicetree@vger.kernel.org>
  12 Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
  13 [sboyd: Split off into separate patch, renamed methods to
  14 match compatible nodes]
  15 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  16 Signed-off-by: Kumar Gala <galak@codeaurora.org>
  17 ---
  18  Documentation/devicetree/bindings/arm/cpus.txt |   25 +++++++++++++++++++++++-
  19  1 file changed, 24 insertions(+), 1 deletion(-)
  20
  21 --- a/Documentation/devicetree/bindings/arm/cpus.txt
  22 +++ b/Documentation/devicetree/bindings/arm/cpus.txt
  23 @@ -180,7 +180,11 @@ nodes to be present and contain the prop
  24                           be one of:
  25                              "spin-table"
  26                              "psci"
  27 -                       # On ARM 32-bit systems this property is optional.
  28 +                       # On ARM 32-bit systems this property is optional and
  29 +                         can be one of:
  30 +                           "qcom,gcc-msm8660"
  31 +                           "qcom,kpss-acc-v1"
  32 +                           "qcom,kpss-acc-v2"
  33
  34         - cpu-release-addr
  35                 Usage: required for systems that have an "enable-method"
  36 @@ -191,6 +195,21 @@ nodes to be present and contain the prop
  37                           property identifying a 64-bit zero-initialised
  38                           memory location.
  39
  40 +       - qcom,saw
  41 +               Usage: required for systems that have an "enable-method"
  42 +                      property value of "qcom,kpss-acc-v1" or
  43 +                      "qcom,kpss-acc-v2"
  44 +               Value type: <phandle>
  45 +               Definition: Specifies the SAW[1] node associated with this CPU.
  46 +
  47 +       - qcom,acc
  48 +               Usage: required for systems that have an "enable-method"
  49 +                      property value of "qcom,kpss-acc-v1" or
  50 +                      "qcom,kpss-acc-v2"
  51 +               Value type: <phandle>
  52 +               Definition: Specifies the ACC[2] node associated with this CPU.
  53 +
  54 +
  55  Example 1 (dual-cluster big.LITTLE system 32-bit):
  56
  57         cpus {
  58 @@ -382,3 +401,7 @@ cpus {
  59                 cpu-release-addr = <0 0x20000000>;
  60         };
  61  };
  62 +
  63 +--
  64 +[1] arm/msm/qcom,saw2.txt
  65 +[2] arm/msm/qcom,kpss-acc.txt