1 From e3946fe8050534ccaf8c1266cb1fa90c7f3345c3 Mon Sep 17 00:00:00 2001
2 From: Tim Harvey <tharvey@gateworks.com>
3 Date: Fri, 7 Feb 2014 15:24:56 +0800
4 Subject: [PATCH] ARM: dts: add Gateworks Ventana support
6 The Gateworks Ventana product family consists of several baseboard designs
7 based on the Freescale i.MX6 family of processors. Each baseboard has a
8 different set of possible features.
10 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
11 Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
13 arch/arm/boot/dts/Makefile | 9 +
14 arch/arm/boot/dts/imx6dl-gw51xx.dts | 19 ++
15 arch/arm/boot/dts/imx6dl-gw52xx.dts | 19 ++
16 arch/arm/boot/dts/imx6dl-gw53xx.dts | 19 ++
17 arch/arm/boot/dts/imx6dl-gw54xx.dts | 19 ++
18 arch/arm/boot/dts/imx6q-gw51xx.dts | 19 ++
19 arch/arm/boot/dts/imx6q-gw52xx.dts | 23 ++
20 arch/arm/boot/dts/imx6q-gw53xx.dts | 23 ++
21 arch/arm/boot/dts/imx6q-gw5400-a.dts | 546 ++++++++++++++++++++++++++++++++
22 arch/arm/boot/dts/imx6q-gw54xx.dts | 23 ++
23 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 374 ++++++++++++++++++++++
24 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 490 ++++++++++++++++++++++++++++
25 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 553 ++++++++++++++++++++++++++++++++
26 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 580 ++++++++++++++++++++++++++++++++++
27 14 files changed, 2716 insertions(+)
28 create mode 100644 arch/arm/boot/dts/imx6dl-gw51xx.dts
29 create mode 100644 arch/arm/boot/dts/imx6dl-gw52xx.dts
30 create mode 100644 arch/arm/boot/dts/imx6dl-gw53xx.dts
31 create mode 100644 arch/arm/boot/dts/imx6dl-gw54xx.dts
32 create mode 100644 arch/arm/boot/dts/imx6q-gw51xx.dts
33 create mode 100644 arch/arm/boot/dts/imx6q-gw52xx.dts
34 create mode 100644 arch/arm/boot/dts/imx6q-gw53xx.dts
35 create mode 100644 arch/arm/boot/dts/imx6q-gw5400-a.dts
36 create mode 100644 arch/arm/boot/dts/imx6q-gw54xx.dts
37 create mode 100644 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
38 create mode 100644 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
39 create mode 100644 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
40 create mode 100644 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
42 --- a/arch/arm/boot/dts/Makefile
43 +++ b/arch/arm/boot/dts/Makefile
44 @@ -154,12 +154,21 @@ dtb-$(CONFIG_ARCH_MXC) += \
52 imx6dl-hummingboard.dtb \
53 imx6dl-sabreauto.dtb \
55 imx6dl-wandboard.dtb \
61 + imx6q-gw5400-a.dtb \
63 imx6q-phytec-pbab01.dtb \
67 +++ b/arch/arm/boot/dts/imx6dl-gw51xx.dts
70 + * Copyright 2013 Gateworks Corporation
72 + * The code contained herein is licensed under the GNU General Public
73 + * License. You may obtain a copy of the GNU General Public License
74 + * Version 2 or later at the following locations:
76 + * http://www.opensource.org/licenses/gpl-license.html
77 + * http://www.gnu.org/copyleft/gpl.html
81 +#include "imx6dl.dtsi"
82 +#include "imx6qdl-gw51xx.dtsi"
85 + model = "Gateworks Ventana i.MX6 DualLite GW51XX";
86 + compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl";
89 +++ b/arch/arm/boot/dts/imx6dl-gw52xx.dts
92 + * Copyright 2013 Gateworks Corporation
94 + * The code contained herein is licensed under the GNU General Public
95 + * License. You may obtain a copy of the GNU General Public License
96 + * Version 2 or later at the following locations:
98 + * http://www.opensource.org/licenses/gpl-license.html
99 + * http://www.gnu.org/copyleft/gpl.html
103 +#include "imx6dl.dtsi"
104 +#include "imx6qdl-gw52xx.dtsi"
107 + model = "Gateworks Ventana i.MX6 DualLite GW52XX";
108 + compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl";
111 +++ b/arch/arm/boot/dts/imx6dl-gw53xx.dts
114 + * Copyright 2013 Gateworks Corporation
116 + * The code contained herein is licensed under the GNU General Public
117 + * License. You may obtain a copy of the GNU General Public License
118 + * Version 2 or later at the following locations:
120 + * http://www.opensource.org/licenses/gpl-license.html
121 + * http://www.gnu.org/copyleft/gpl.html
125 +#include "imx6dl.dtsi"
126 +#include "imx6qdl-gw53xx.dtsi"
129 + model = "Gateworks Ventana i.MX6 DualLite GW53XX";
130 + compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl";
133 +++ b/arch/arm/boot/dts/imx6dl-gw54xx.dts
136 + * Copyright 2013 Gateworks Corporation
138 + * The code contained herein is licensed under the GNU General Public
139 + * License. You may obtain a copy of the GNU General Public License
140 + * Version 2 or later at the following locations:
142 + * http://www.opensource.org/licenses/gpl-license.html
143 + * http://www.gnu.org/copyleft/gpl.html
147 +#include "imx6dl.dtsi"
148 +#include "imx6qdl-gw54xx.dtsi"
151 + model = "Gateworks Ventana i.MX6 DualLite GW54XX";
152 + compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl";
155 +++ b/arch/arm/boot/dts/imx6q-gw51xx.dts
158 + * Copyright 2013 Gateworks Corporation
160 + * The code contained herein is licensed under the GNU General Public
161 + * License. You may obtain a copy of the GNU General Public License
162 + * Version 2 or later at the following locations:
164 + * http://www.opensource.org/licenses/gpl-license.html
165 + * http://www.gnu.org/copyleft/gpl.html
169 +#include "imx6q.dtsi"
170 +#include "imx6qdl-gw54xx.dtsi"
173 + model = "Gateworks Ventana i.MX6 Quad GW51XX";
174 + compatible = "gw,imx6q-gw51xx", "gw,ventana", "fsl,imx6q";
177 +++ b/arch/arm/boot/dts/imx6q-gw52xx.dts
180 + * Copyright 2013 Gateworks Corporation
182 + * The code contained herein is licensed under the GNU General Public
183 + * License. You may obtain a copy of the GNU General Public License
184 + * Version 2 or later at the following locations:
186 + * http://www.opensource.org/licenses/gpl-license.html
187 + * http://www.gnu.org/copyleft/gpl.html
191 +#include "imx6q.dtsi"
192 +#include "imx6qdl-gw52xx.dtsi"
195 + model = "Gateworks Ventana i.MX6 Quad GW52XX";
196 + compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q";
203 +++ b/arch/arm/boot/dts/imx6q-gw53xx.dts
206 + * Copyright 2013 Gateworks Corporation
208 + * The code contained herein is licensed under the GNU General Public
209 + * License. You may obtain a copy of the GNU General Public License
210 + * Version 2 or later at the following locations:
212 + * http://www.opensource.org/licenses/gpl-license.html
213 + * http://www.gnu.org/copyleft/gpl.html
217 +#include "imx6q.dtsi"
218 +#include "imx6qdl-gw53xx.dtsi"
221 + model = "Gateworks Ventana i.MX6 Quad GW53XX";
222 + compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q";
229 +++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
232 + * Copyright 2013 Gateworks Corporation
234 + * The code contained herein is licensed under the GNU General Public
235 + * License. You may obtain a copy of the GNU General Public License
236 + * Version 2 or later at the following locations:
238 + * http://www.opensource.org/licenses/gpl-license.html
239 + * http://www.gnu.org/copyleft/gpl.html
243 +#include "imx6q.dtsi"
246 + model = "Gateworks Ventana GW5400-A";
247 + compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
249 + /* these are used by bootloader for disabling nodes */
268 + bootargs = "console=ttymxc1,115200";
272 + compatible = "gpio-leds";
276 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
277 + default-state = "on";
278 + linux,default-trigger = "heartbeat";
283 + gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */
284 + default-state = "off";
289 + gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
290 + default-state = "off";
295 + reg = <0x10000000 0x40000000>;
299 + compatible = "pps-gpio";
300 + gpios = <&gpio1 5 0>;
305 + compatible = "simple-bus";
306 + #address-cells = <1>;
309 + reg_1p0v: regulator@0 {
310 + compatible = "regulator-fixed";
312 + regulator-name = "1P0V";
313 + regulator-min-microvolt = <1000000>;
314 + regulator-max-microvolt = <1000000>;
315 + regulator-always-on;
318 + reg_3p3v: regulator@1 {
319 + compatible = "regulator-fixed";
321 + regulator-name = "3P3V";
322 + regulator-min-microvolt = <3300000>;
323 + regulator-max-microvolt = <3300000>;
324 + regulator-always-on;
327 + reg_usb_h1_vbus: regulator@2 {
328 + compatible = "regulator-fixed";
330 + regulator-name = "usb_h1_vbus";
331 + regulator-min-microvolt = <5000000>;
332 + regulator-max-microvolt = <5000000>;
333 + regulator-always-on;
336 + reg_usb_otg_vbus: regulator@3 {
337 + compatible = "regulator-fixed";
339 + regulator-name = "usb_otg_vbus";
340 + regulator-min-microvolt = <5000000>;
341 + regulator-max-microvolt = <5000000>;
342 + gpio = <&gpio3 22 0>;
343 + enable-active-high;
348 + compatible = "fsl,imx6q-sabrelite-sgtl5000",
349 + "fsl,imx-audio-sgtl5000";
350 + model = "imx6q-sabrelite-sgtl5000";
351 + ssi-controller = <&ssi1>;
352 + audio-codec = <&codec>;
354 + "MIC_IN", "Mic Jack",
355 + "Mic Jack", "Mic Bias",
356 + "Headphone Jack", "HP_OUT";
357 + mux-int-port = <1>;
358 + mux-ext-port = <4>;
363 + pinctrl-names = "default";
364 + pinctrl-0 = <&pinctrl_audmux>;
369 + fsl,spi-num-chipselects = <1>;
370 + cs-gpios = <&gpio3 19 0>;
371 + pinctrl-names = "default";
372 + pinctrl-0 = <&pinctrl_ecspi1>;
376 + compatible = "sst,w25q256";
377 + spi-max-frequency = <30000000>;
383 + pinctrl-names = "default";
384 + pinctrl-0 = <&pinctrl_enet>;
385 + phy-mode = "rgmii";
386 + phy-reset-gpios = <&gpio1 30 0>;
391 + clock-frequency = <100000>;
392 + pinctrl-names = "default";
393 + pinctrl-0 = <&pinctrl_i2c1>;
396 + eeprom1: eeprom@50 {
397 + compatible = "atmel,24c02";
402 + eeprom2: eeprom@51 {
403 + compatible = "atmel,24c02";
408 + eeprom3: eeprom@52 {
409 + compatible = "atmel,24c02";
414 + eeprom4: eeprom@53 {
415 + compatible = "atmel,24c02";
421 + compatible = "nxp,pca9555";
428 + compatible = "gw,gsp";
433 + compatible = "dallas,ds1672";
439 + clock-frequency = <100000>;
440 + pinctrl-names = "default";
441 + pinctrl-0 = <&pinctrl_i2c2>;
444 + pmic: pfuze100@08 {
445 + compatible = "fsl,pfuze100";
450 + regulator-min-microvolt = <300000>;
451 + regulator-max-microvolt = <1875000>;
453 + regulator-always-on;
454 + regulator-ramp-delay = <6250>;
458 + regulator-min-microvolt = <300000>;
459 + regulator-max-microvolt = <1875000>;
461 + regulator-always-on;
462 + regulator-ramp-delay = <6250>;
466 + regulator-min-microvolt = <800000>;
467 + regulator-max-microvolt = <3950000>;
469 + regulator-always-on;
473 + regulator-min-microvolt = <400000>;
474 + regulator-max-microvolt = <1975000>;
476 + regulator-always-on;
480 + regulator-min-microvolt = <400000>;
481 + regulator-max-microvolt = <1975000>;
483 + regulator-always-on;
487 + regulator-min-microvolt = <800000>;
488 + regulator-max-microvolt = <3300000>;
492 + regulator-min-microvolt = <5000000>;
493 + regulator-max-microvolt = <5150000>;
497 + regulator-min-microvolt = <1000000>;
498 + regulator-max-microvolt = <3000000>;
500 + regulator-always-on;
503 + vref_reg: vrefddr {
505 + regulator-always-on;
509 + regulator-min-microvolt = <800000>;
510 + regulator-max-microvolt = <1550000>;
514 + regulator-min-microvolt = <800000>;
515 + regulator-max-microvolt = <1550000>;
519 + regulator-min-microvolt = <1800000>;
520 + regulator-max-microvolt = <3300000>;
524 + regulator-min-microvolt = <1800000>;
525 + regulator-max-microvolt = <3300000>;
526 + regulator-always-on;
530 + regulator-min-microvolt = <1800000>;
531 + regulator-max-microvolt = <3300000>;
532 + regulator-always-on;
536 + regulator-min-microvolt = <1800000>;
537 + regulator-max-microvolt = <3300000>;
538 + regulator-always-on;
543 + pciswitch: pex8609@3f {
544 + compatible = "plx,pex8609";
548 + pciclkgen: si52147@6b {
549 + compatible = "sil,si52147";
555 + clock-frequency = <100000>;
556 + pinctrl-names = "default";
557 + pinctrl-0 = <&pinctrl_i2c3>;
560 + accelerometer: mma8450@1c {
561 + compatible = "fsl,mma8450";
565 + codec: sgtl5000@0a {
566 + compatible = "fsl,sgtl5000";
568 + clocks = <&clks 201>;
569 + VDDA-supply = <&sw4_reg>;
570 + VDDIO-supply = <®_3p3v>;
573 + hdmiin: adv7611@4c {
574 + compatible = "adi,adv7611";
578 + touchscreen: egalax_ts@04 {
579 + compatible = "eeti,egalax_ts";
581 + interrupt-parent = <&gpio7>;
582 + interrupts = <12 2>; /* gpio7_12 active low */
583 + wakeup-gpios = <&gpio7 12 0>;
586 + videoout: adv7393@2a {
587 + compatible = "adi,adv7393";
591 + videoin: adv7180@20 {
592 + compatible = "adi,adv7180";
598 + pinctrl-names = "default";
599 + pinctrl-0 = <&pinctrl_hog>;
602 + pinctrl_hog: hoggrp {
604 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
605 + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
606 + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
607 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
608 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
609 + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 /* GPS_PPS */
610 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
611 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
612 + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* user2 led */
613 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
614 + MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
615 + MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
619 + pinctrl_audmux: audmuxgrp {
621 + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
622 + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
623 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
624 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
628 + pinctrl_ecspi1: ecspi1grp {
630 + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
631 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
632 + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
636 + pinctrl_enet: enetgrp {
638 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
639 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
640 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
641 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
642 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
643 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
644 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
645 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
646 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
647 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
648 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
649 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
650 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
651 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
652 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
653 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
657 + pinctrl_i2c1: i2c1grp {
659 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
660 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
664 + pinctrl_i2c2: i2c2grp {
666 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
667 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
671 + pinctrl_i2c3: i2c3grp {
673 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
674 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
678 + pinctrl_uart1: uart1grp {
680 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
681 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
685 + pinctrl_uart2: uart2grp {
687 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
688 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
692 + pinctrl_uart5: uart5grp {
694 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
695 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
699 + pinctrl_usbotg: usbotggrp {
701 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
705 + pinctrl_usdhc3: usdhc3grp {
707 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
708 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
709 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
710 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
711 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
712 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
721 + crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
726 + reset-gpio = <&gpio1 29 0>;
729 + eth1: sky2@8 { /* MAC/PHY on bus 8 */
730 + compatible = "marvell,sky2";
735 + fsl,mode = "i2s-slave";
740 + pinctrl-names = "default";
741 + pinctrl-0 = <&pinctrl_uart1>;
746 + pinctrl-names = "default";
747 + pinctrl-0 = <&pinctrl_uart2>;
752 + pinctrl-names = "default";
753 + pinctrl-0 = <&pinctrl_uart5>;
758 + vbus-supply = <®_usb_otg_vbus>;
759 + pinctrl-names = "default";
760 + pinctrl-0 = <&pinctrl_usbotg>;
761 + disable-over-current;
766 + vbus-supply = <®_usb_h1_vbus>;
771 + pinctrl-names = "default";
772 + pinctrl-0 = <&pinctrl_usdhc3>;
773 + cd-gpios = <&gpio7 0 0>;
774 + vmmc-supply = <®_3p3v>;
778 +++ b/arch/arm/boot/dts/imx6q-gw54xx.dts
781 + * Copyright 2013 Gateworks Corporation
783 + * The code contained herein is licensed under the GNU General Public
784 + * License. You may obtain a copy of the GNU General Public License
785 + * Version 2 or later at the following locations:
787 + * http://www.opensource.org/licenses/gpl-license.html
788 + * http://www.gnu.org/copyleft/gpl.html
792 +#include "imx6q.dtsi"
793 +#include "imx6qdl-gw54xx.dtsi"
796 + model = "Gateworks Ventana i.MX6 Quad GW54XX";
797 + compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
804 +++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
807 + * Copyright 2013 Gateworks Corporation
809 + * The code contained herein is licensed under the GNU General Public
810 + * License. You may obtain a copy of the GNU General Public License
811 + * Version 2 or later at the following locations:
813 + * http://www.opensource.org/licenses/gpl-license.html
814 + * http://www.gnu.org/copyleft/gpl.html
818 + /* these are used by bootloader for disabling nodes */
830 + bootargs = "console=ttymxc1,115200";
834 + compatible = "gpio-leds";
838 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
839 + default-state = "on";
840 + linux,default-trigger = "heartbeat";
845 + gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
846 + default-state = "off";
851 + reg = <0x10000000 0x20000000>;
855 + compatible = "pps-gpio";
856 + gpios = <&gpio1 26 0>;
861 + compatible = "simple-bus";
862 + #address-cells = <1>;
865 + reg_3p3v: regulator@0 {
866 + compatible = "regulator-fixed";
868 + regulator-name = "3P3V";
869 + regulator-min-microvolt = <3300000>;
870 + regulator-max-microvolt = <3300000>;
871 + regulator-always-on;
874 + reg_5p0v: regulator@1 {
875 + compatible = "regulator-fixed";
877 + regulator-name = "5P0V";
878 + regulator-min-microvolt = <5000000>;
879 + regulator-max-microvolt = <5000000>;
880 + regulator-always-on;
883 + reg_usb_otg_vbus: regulator@2 {
884 + compatible = "regulator-fixed";
886 + regulator-name = "usb_otg_vbus";
887 + regulator-min-microvolt = <5000000>;
888 + regulator-max-microvolt = <5000000>;
889 + gpio = <&gpio3 22 0>;
890 + enable-active-high;
896 + pinctrl-names = "default";
897 + pinctrl-0 = <&pinctrl_enet>;
898 + phy-mode = "rgmii";
899 + phy-reset-gpios = <&gpio1 30 0>;
904 + pinctrl-names = "default";
905 + pinctrl-0 = <&pinctrl_gpmi_nand>;
910 + clock-frequency = <100000>;
911 + pinctrl-names = "default";
912 + pinctrl-0 = <&pinctrl_i2c1>;
915 + eeprom1: eeprom@50 {
916 + compatible = "atmel,24c02";
921 + eeprom2: eeprom@51 {
922 + compatible = "atmel,24c02";
927 + eeprom3: eeprom@52 {
928 + compatible = "atmel,24c02";
933 + eeprom4: eeprom@53 {
934 + compatible = "atmel,24c02";
940 + compatible = "nxp,pca9555";
947 + compatible = "gw,gsp";
952 + compatible = "dallas,ds1672";
958 + clock-frequency = <100000>;
959 + pinctrl-names = "default";
960 + pinctrl-0 = <&pinctrl_i2c2>;
964 + compatible = "ltc,ltc3676";
968 + sw1_reg: ltc3676__sw1 {
969 + regulator-min-microvolt = <1175000>;
970 + regulator-max-microvolt = <1175000>;
972 + regulator-always-on;
975 + sw2_reg: ltc3676__sw2 {
976 + regulator-min-microvolt = <1800000>;
977 + regulator-max-microvolt = <1800000>;
979 + regulator-always-on;
982 + sw3_reg: ltc3676__sw3 {
983 + regulator-min-microvolt = <1175000>;
984 + regulator-max-microvolt = <1175000>;
986 + regulator-always-on;
989 + sw4_reg: ltc3676__sw4 {
990 + regulator-min-microvolt = <1500000>;
991 + regulator-max-microvolt = <1500000>;
993 + regulator-always-on;
996 + ldo2_reg: ltc3676__ldo2 {
997 + regulator-min-microvolt = <2500000>;
998 + regulator-max-microvolt = <2500000>;
1000 + regulator-always-on;
1003 + ldo4_reg: ltc3676__ldo4 {
1004 + regulator-min-microvolt = <3000000>;
1005 + regulator-max-microvolt = <3000000>;
1012 + clock-frequency = <100000>;
1013 + pinctrl-names = "default";
1014 + pinctrl-0 = <&pinctrl_i2c3>;
1017 + videoin: adv7180@20 {
1018 + compatible = "adi,adv7180";
1024 + pinctrl-names = "default";
1025 + pinctrl-0 = <&pinctrl_hog>;
1028 + pinctrl_hog: hoggrp {
1030 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
1031 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
1032 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
1033 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
1034 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
1035 + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* PCIE_RST# */
1036 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
1037 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
1041 + pinctrl_enet: enetgrp {
1043 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
1044 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
1045 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
1046 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
1047 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
1048 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
1049 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
1050 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
1051 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
1052 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
1053 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
1054 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
1055 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
1056 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
1057 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
1058 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
1062 + pinctrl_gpmi_nand: gpminandgrp {
1064 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
1065 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
1066 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
1067 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
1068 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
1069 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
1070 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
1071 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
1072 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
1073 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
1074 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
1075 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
1076 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
1077 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
1078 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
1079 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
1083 + pinctrl_i2c1: i2c1grp {
1085 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
1086 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
1090 + pinctrl_i2c2: i2c2grp {
1092 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
1093 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
1097 + pinctrl_i2c3: i2c3grp {
1099 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
1100 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
1104 + pinctrl_uart1: uart1grp {
1106 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
1107 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
1111 + pinctrl_uart2: uart2grp {
1113 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
1114 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
1118 + pinctrl_uart3: uart3grp {
1120 + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
1121 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
1125 + pinctrl_uart5: uart5grp {
1127 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
1128 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
1132 + pinctrl_usbotg: usbotggrp {
1134 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
1141 + reset-gpio = <&gpio1 0 0>;
1146 + pinctrl-names = "default";
1147 + pinctrl-0 = <&pinctrl_uart1>;
1152 + pinctrl-names = "default";
1153 + pinctrl-0 = <&pinctrl_uart2>;
1158 + pinctrl-names = "default";
1159 + pinctrl-0 = <&pinctrl_uart3>;
1164 + pinctrl-names = "default";
1165 + pinctrl-0 = <&pinctrl_uart5>;
1170 + vbus-supply = <®_usb_otg_vbus>;
1171 + pinctrl-names = "default";
1172 + pinctrl-0 = <&pinctrl_usbotg>;
1173 + disable-over-current;
1181 +++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
1184 + * Copyright 2013 Gateworks Corporation
1186 + * The code contained herein is licensed under the GNU General Public
1187 + * License. You may obtain a copy of the GNU General Public License
1188 + * Version 2 or later at the following locations:
1190 + * http://www.opensource.org/licenses/gpl-license.html
1191 + * http://www.gnu.org/copyleft/gpl.html
1195 + /* these are used by bootloader for disabling nodes */
1209 + bootargs = "console=ttymxc1,115200";
1213 + compatible = "gpio-leds";
1217 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
1218 + default-state = "on";
1219 + linux,default-trigger = "heartbeat";
1224 + gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
1225 + default-state = "off";
1230 + gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */
1231 + default-state = "off";
1236 + reg = <0x10000000 0x20000000>;
1240 + compatible = "pps-gpio";
1241 + gpios = <&gpio1 26 0>;
1246 + compatible = "simple-bus";
1247 + #address-cells = <1>;
1248 + #size-cells = <0>;
1250 + reg_1p0v: regulator@0 {
1251 + compatible = "regulator-fixed";
1253 + regulator-name = "1P0V";
1254 + regulator-min-microvolt = <1000000>;
1255 + regulator-max-microvolt = <1000000>;
1256 + regulator-always-on;
1259 + /* remove this fixed regulator once ltc3676__sw2 driver available */
1260 + reg_1p8v: regulator@1 {
1261 + compatible = "regulator-fixed";
1263 + regulator-name = "1P8V";
1264 + regulator-min-microvolt = <1800000>;
1265 + regulator-max-microvolt = <1800000>;
1266 + regulator-always-on;
1269 + reg_3p3v: regulator@2 {
1270 + compatible = "regulator-fixed";
1272 + regulator-name = "3P3V";
1273 + regulator-min-microvolt = <3300000>;
1274 + regulator-max-microvolt = <3300000>;
1275 + regulator-always-on;
1278 + reg_5p0v: regulator@3 {
1279 + compatible = "regulator-fixed";
1281 + regulator-name = "5P0V";
1282 + regulator-min-microvolt = <5000000>;
1283 + regulator-max-microvolt = <5000000>;
1284 + regulator-always-on;
1287 + reg_usb_otg_vbus: regulator@4 {
1288 + compatible = "regulator-fixed";
1290 + regulator-name = "usb_otg_vbus";
1291 + regulator-min-microvolt = <5000000>;
1292 + regulator-max-microvolt = <5000000>;
1293 + gpio = <&gpio3 22 0>;
1294 + enable-active-high;
1299 + compatible = "fsl,imx6q-sabrelite-sgtl5000",
1300 + "fsl,imx-audio-sgtl5000";
1301 + model = "imx6q-sabrelite-sgtl5000";
1302 + ssi-controller = <&ssi1>;
1303 + audio-codec = <&codec>;
1305 + "MIC_IN", "Mic Jack",
1306 + "Mic Jack", "Mic Bias",
1307 + "Headphone Jack", "HP_OUT";
1308 + mux-int-port = <1>;
1309 + mux-ext-port = <4>;
1314 + pinctrl-names = "default";
1315 + pinctrl-0 = <&pinctrl_audmux>;
1320 + pinctrl-names = "default";
1321 + pinctrl-0 = <&pinctrl_enet>;
1322 + phy-mode = "rgmii";
1323 + phy-reset-gpios = <&gpio1 30 0>;
1328 + pinctrl-names = "default";
1329 + pinctrl-0 = <&pinctrl_gpmi_nand>;
1334 + clock-frequency = <100000>;
1335 + pinctrl-names = "default";
1336 + pinctrl-0 = <&pinctrl_i2c1>;
1339 + eeprom1: eeprom@50 {
1340 + compatible = "atmel,24c02";
1345 + eeprom2: eeprom@51 {
1346 + compatible = "atmel,24c02";
1351 + eeprom3: eeprom@52 {
1352 + compatible = "atmel,24c02";
1357 + eeprom4: eeprom@53 {
1358 + compatible = "atmel,24c02";
1363 + gpio: pca9555@23 {
1364 + compatible = "nxp,pca9555";
1367 + #gpio-cells = <2>;
1371 + compatible = "gw,gsp";
1376 + compatible = "dallas,ds1672";
1382 + clock-frequency = <100000>;
1383 + pinctrl-names = "default";
1384 + pinctrl-0 = <&pinctrl_i2c2>;
1387 + pciswitch: pex8609@3f {
1388 + compatible = "plx,pex8609";
1392 + pmic: ltc3676@3c {
1393 + compatible = "ltc,ltc3676";
1397 + sw1_reg: ltc3676__sw1 {
1398 + regulator-min-microvolt = <1175000>;
1399 + regulator-max-microvolt = <1175000>;
1400 + regulator-boot-on;
1401 + regulator-always-on;
1404 + sw2_reg: ltc3676__sw2 {
1405 + regulator-min-microvolt = <1800000>;
1406 + regulator-max-microvolt = <1800000>;
1407 + regulator-boot-on;
1408 + regulator-always-on;
1411 + sw3_reg: ltc3676__sw3 {
1412 + regulator-min-microvolt = <1175000>;
1413 + regulator-max-microvolt = <1175000>;
1414 + regulator-boot-on;
1415 + regulator-always-on;
1418 + sw4_reg: ltc3676__sw4 {
1419 + regulator-min-microvolt = <1500000>;
1420 + regulator-max-microvolt = <1500000>;
1421 + regulator-boot-on;
1422 + regulator-always-on;
1425 + ldo2_reg: ltc3676__ldo2 {
1426 + regulator-min-microvolt = <2500000>;
1427 + regulator-max-microvolt = <2500000>;
1428 + regulator-boot-on;
1429 + regulator-always-on;
1432 + ldo3_reg: ltc3676__ldo3 {
1433 + regulator-min-microvolt = <1800000>;
1434 + regulator-max-microvolt = <1800000>;
1435 + regulator-boot-on;
1436 + regulator-always-on;
1439 + ldo4_reg: ltc3676__ldo4 {
1440 + regulator-min-microvolt = <3000000>;
1441 + regulator-max-microvolt = <3000000>;
1448 + clock-frequency = <100000>;
1449 + pinctrl-names = "default";
1450 + pinctrl-0 = <&pinctrl_i2c3>;
1453 + accelerometer: fxos8700@1e {
1454 + compatible = "fsl,fxos8700";
1458 + codec: sgtl5000@0a {
1459 + compatible = "fsl,sgtl5000";
1461 + clocks = <&clks 169>;
1462 + VDDA-supply = <®_1p8v>;
1463 + VDDIO-supply = <®_3p3v>;
1466 + touchscreen: egalax_ts@04 {
1467 + compatible = "eeti,egalax_ts";
1469 + interrupt-parent = <&gpio7>;
1470 + interrupts = <12 2>; /* gpio7_12 active low */
1471 + wakeup-gpios = <&gpio7 12 0>;
1474 + videoin: adv7180@20 {
1475 + compatible = "adi,adv7180";
1481 + pinctrl-names = "default";
1482 + pinctrl-0 = <&pinctrl_hog>;
1485 + pinctrl_hog: hoggrp {
1487 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
1488 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
1489 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
1490 + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x80000000 /* VIDDEC_PDN# */
1491 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
1492 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
1493 + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */
1494 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
1495 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
1496 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USB_SEL_PCI */
1497 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
1498 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
1499 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
1500 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
1501 + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* LVDS_TCH# */
1502 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_CD# */
1503 + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 /* UART2_EN# */
1507 + pinctrl_audmux: audmuxgrp {
1509 + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
1510 + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
1511 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
1512 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
1516 + pinctrl_enet: enetgrp {
1518 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
1519 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
1520 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
1521 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
1522 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
1523 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
1524 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
1525 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
1526 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
1527 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
1528 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
1529 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
1530 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
1531 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
1532 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
1533 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
1537 + pinctrl_gpmi_nand: gpminandgrp {
1539 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
1540 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
1541 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
1542 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
1543 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
1544 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
1545 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
1546 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
1547 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
1548 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
1549 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
1550 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
1551 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
1552 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
1553 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
1554 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
1558 + pinctrl_i2c1: i2c1grp {
1560 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
1561 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
1565 + pinctrl_i2c2: i2c2grp {
1567 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
1568 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
1572 + pinctrl_i2c3: i2c3grp {
1574 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
1575 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
1579 + pinctrl_uart1: uart1grp {
1581 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
1582 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
1586 + pinctrl_uart2: uart2grp {
1588 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
1589 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
1593 + pinctrl_uart5: uart5grp {
1595 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
1596 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
1600 + pinctrl_usbotg: usbotggrp {
1602 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
1606 + pinctrl_usdhc3: usdhc3grp {
1608 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
1609 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
1610 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
1611 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
1612 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
1613 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
1622 + crtcs = <&ipu1 0>, <&ipu1 1>;
1627 + reset-gpio = <&gpio1 29 0>;
1632 + fsl,mode = "i2s-slave";
1637 + pinctrl-names = "default";
1638 + pinctrl-0 = <&pinctrl_uart1>;
1643 + pinctrl-names = "default";
1644 + pinctrl-0 = <&pinctrl_uart2>;
1649 + pinctrl-names = "default";
1650 + pinctrl-0 = <&pinctrl_uart5>;
1655 + vbus-supply = <®_usb_otg_vbus>;
1656 + pinctrl-names = "default";
1657 + pinctrl-0 = <&pinctrl_usbotg>;
1658 + disable-over-current;
1667 + pinctrl-names = "default";
1668 + pinctrl-0 = <&pinctrl_usdhc3>;
1669 + cd-gpios = <&gpio7 0 0>;
1670 + vmmc-supply = <®_3p3v>;
1674 +++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
1677 + * Copyright 2013 Gateworks Corporation
1679 + * The code contained herein is licensed under the GNU General Public
1680 + * License. You may obtain a copy of the GNU General Public License
1681 + * Version 2 or later at the following locations:
1683 + * http://www.opensource.org/licenses/gpl-license.html
1684 + * http://www.gnu.org/copyleft/gpl.html
1688 + /* these are used by bootloader for disabling nodes */
1692 + ethernet1 = ð1;
1705 + bootargs = "console=ttymxc1,115200";
1709 + compatible = "gpio-leds";
1713 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
1714 + default-state = "on";
1715 + linux,default-trigger = "heartbeat";
1720 + gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
1721 + default-state = "off";
1726 + gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
1727 + default-state = "off";
1732 + reg = <0x10000000 0x40000000>;
1736 + compatible = "pps-gpio";
1737 + gpios = <&gpio1 26 0>;
1742 + compatible = "simple-bus";
1743 + #address-cells = <1>;
1744 + #size-cells = <0>;
1746 + reg_1p0v: regulator@0 {
1747 + compatible = "regulator-fixed";
1749 + regulator-name = "1P0V";
1750 + regulator-min-microvolt = <1000000>;
1751 + regulator-max-microvolt = <1000000>;
1752 + regulator-always-on;
1755 + /* remove when pmic 1p8 regulator available */
1756 + reg_1p8v: regulator@1 {
1757 + compatible = "regulator-fixed";
1759 + regulator-name = "1P8V";
1760 + regulator-min-microvolt = <1800000>;
1761 + regulator-max-microvolt = <1800000>;
1762 + regulator-always-on;
1765 + reg_3p3v: regulator@2 {
1766 + compatible = "regulator-fixed";
1768 + regulator-name = "3P3V";
1769 + regulator-min-microvolt = <3300000>;
1770 + regulator-max-microvolt = <3300000>;
1771 + regulator-always-on;
1774 + reg_usb_h1_vbus: regulator@3 {
1775 + compatible = "regulator-fixed";
1777 + regulator-name = "usb_h1_vbus";
1778 + regulator-min-microvolt = <5000000>;
1779 + regulator-max-microvolt = <5000000>;
1780 + regulator-always-on;
1783 + reg_usb_otg_vbus: regulator@4 {
1784 + compatible = "regulator-fixed";
1786 + regulator-name = "usb_otg_vbus";
1787 + regulator-min-microvolt = <5000000>;
1788 + regulator-max-microvolt = <5000000>;
1789 + gpio = <&gpio3 22 0>;
1790 + enable-active-high;
1795 + compatible = "fsl,imx6q-sabrelite-sgtl5000",
1796 + "fsl,imx-audio-sgtl5000";
1797 + model = "imx6q-sabrelite-sgtl5000";
1798 + ssi-controller = <&ssi1>;
1799 + audio-codec = <&codec>;
1801 + "MIC_IN", "Mic Jack",
1802 + "Mic Jack", "Mic Bias",
1803 + "Headphone Jack", "HP_OUT";
1804 + mux-int-port = <1>;
1805 + mux-ext-port = <4>;
1810 + pinctrl-names = "default";
1811 + pinctrl-0 = <&pinctrl_audmux>;
1816 + pinctrl-names = "default";
1817 + pinctrl-0 = <&pinctrl_flexcan1>;
1822 + pinctrl-names = "default";
1823 + pinctrl-0 = <&pinctrl_enet>;
1824 + phy-mode = "rgmii";
1825 + phy-reset-gpios = <&gpio1 30 0>;
1830 + pinctrl-names = "default";
1831 + pinctrl-0 = <&pinctrl_gpmi_nand>;
1836 + clock-frequency = <100000>;
1837 + pinctrl-names = "default";
1838 + pinctrl-0 = <&pinctrl_i2c1>;
1841 + eeprom1: eeprom@50 {
1842 + compatible = "atmel,24c02";
1847 + eeprom2: eeprom@51 {
1848 + compatible = "atmel,24c02";
1853 + eeprom3: eeprom@52 {
1854 + compatible = "atmel,24c02";
1859 + eeprom4: eeprom@53 {
1860 + compatible = "atmel,24c02";
1865 + gpio: pca9555@23 {
1866 + compatible = "nxp,pca9555";
1869 + #gpio-cells = <2>;
1873 + compatible = "gw,gsp";
1878 + compatible = "dallas,ds1672";
1884 + clock-frequency = <100000>;
1885 + pinctrl-names = "default";
1886 + pinctrl-0 = <&pinctrl_i2c2>;
1889 + pciclkgen: si53156@6b {
1890 + compatible = "sil,si53156";
1894 + pciswitch: pex8606@3f {
1895 + compatible = "plx,pex8606";
1899 + pmic: ltc3676@3c {
1900 + compatible = "ltc,ltc3676";
1905 + sw1_reg: ltc3676__sw1 {
1906 + regulator-min-microvolt = <1175000>;
1907 + regulator-max-microvolt = <1175000>;
1908 + regulator-boot-on;
1909 + regulator-always-on;
1913 + sw2_reg: ltc3676__sw2 {
1914 + regulator-min-microvolt = <1800000>;
1915 + regulator-max-microvolt = <1800000>;
1916 + regulator-boot-on;
1917 + regulator-always-on;
1921 + sw3_reg: ltc3676__sw3 {
1922 + regulator-min-microvolt = <1175000>;
1923 + regulator-max-microvolt = <1175000>;
1924 + regulator-boot-on;
1925 + regulator-always-on;
1929 + sw4_reg: ltc3676__sw4 {
1930 + regulator-min-microvolt = <1500000>;
1931 + regulator-max-microvolt = <1500000>;
1932 + regulator-boot-on;
1933 + regulator-always-on;
1937 + ldo2_reg: ltc3676__ldo2 {
1938 + regulator-min-microvolt = <2500000>;
1939 + regulator-max-microvolt = <2500000>;
1940 + regulator-boot-on;
1941 + regulator-always-on;
1945 + ldo3_reg: ltc3676__ldo3 {
1946 + regulator-min-microvolt = <1800000>;
1947 + regulator-max-microvolt = <1800000>;
1948 + regulator-boot-on;
1949 + regulator-always-on;
1953 + ldo4_reg: ltc3676__ldo4 {
1954 + regulator-min-microvolt = <3000000>;
1955 + regulator-max-microvolt = <3000000>;
1962 + clock-frequency = <100000>;
1963 + pinctrl-names = "default";
1964 + pinctrl-0 = <&pinctrl_i2c3>;
1967 + accelerometer: fxos8700@1e {
1968 + compatible = "fsl,fxos8700";
1972 + codec: sgtl5000@0a {
1973 + compatible = "fsl,sgtl5000";
1975 + clocks = <&clks 201>;
1976 + VDDA-supply = <®_1p8v>;
1977 + VDDIO-supply = <®_3p3v>;
1980 + hdmiin: adv7611@4c {
1981 + compatible = "adi,adv7611";
1985 + touchscreen: egalax_ts@04 {
1986 + compatible = "eeti,egalax_ts";
1988 + interrupt-parent = <&gpio1>;
1989 + interrupts = <11 2>; /* gpio1_11 active low */
1990 + wakeup-gpios = <&gpio1 11 0>;
1993 + videoout: adv7393@2a {
1994 + compatible = "adi,adv7393";
1998 + videoin: adv7180@20 {
1999 + compatible = "adi,adv7180";
2005 + pinctrl-names = "default";
2006 + pinctrl-0 = <&pinctrl_hog>;
2009 + pinctrl_hog: hoggrp {
2011 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* PCIE6EXP_DIO0 */
2012 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* PCIE6EXP_DIO1 */
2013 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
2014 + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_SHDN */
2015 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
2016 + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
2017 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
2018 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
2019 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
2020 + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000 /* PMIC_IRQ# */
2021 + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* HUB_RST# */
2022 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIE_WDIS# */
2023 + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* ACCEL_IRQ# */
2024 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
2025 + MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000 /* USBOTG_OC# */
2026 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
2027 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
2028 + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* TOUCH_IRQ# */
2029 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_DET# */
2033 + pinctrl_audmux: audmuxgrp {
2035 + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
2036 + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
2037 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
2038 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
2042 + pinctrl_enet: enetgrp {
2044 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
2045 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
2046 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
2047 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
2048 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
2049 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
2050 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
2051 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
2052 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
2053 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
2054 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
2055 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
2056 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
2057 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
2058 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
2059 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
2063 + pinctrl_flexcan1: flexcan1grp {
2065 + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
2066 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
2070 + pinctrl_gpmi_nand: gpminandgrp {
2072 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
2073 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
2074 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
2075 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
2076 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
2077 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
2078 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
2079 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
2080 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
2081 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
2082 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
2083 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
2084 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
2085 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
2086 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
2087 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
2091 + pinctrl_i2c1: i2c1grp {
2093 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
2094 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
2098 + pinctrl_i2c2: i2c2grp {
2100 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
2101 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
2105 + pinctrl_i2c3: i2c3grp {
2107 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
2108 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
2112 + pinctrl_uart1: uart1grp {
2114 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
2115 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
2119 + pinctrl_uart2: uart2grp {
2121 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
2122 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
2126 + pinctrl_uart5: uart5grp {
2128 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
2129 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
2133 + pinctrl_usbotg: usbotggrp {
2135 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
2139 + pinctrl_usdhc3: usdhc3grp {
2141 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
2142 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
2143 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
2144 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
2145 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
2146 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
2156 + fsl,data-mapping = "spwg";
2157 + fsl,data-width = <18>;
2161 + native-mode = <&timing0>;
2162 + timing0: hsd100pxn1 {
2163 + clock-frequency = <65000000>;
2166 + hback-porch = <220>;
2167 + hfront-porch = <40>;
2168 + vback-porch = <21>;
2169 + vfront-porch = <7>;
2178 + reset-gpio = <&gpio1 29 0>;
2181 + eth1: sky2@8 { /* MAC/PHY on bus 8 */
2182 + compatible = "marvell,sky2";
2187 + fsl,mode = "i2s-slave";
2192 + pinctrl-names = "default";
2193 + pinctrl-0 = <&pinctrl_uart1>;
2198 + pinctrl-names = "default";
2199 + pinctrl-0 = <&pinctrl_uart2>;
2204 + pinctrl-names = "default";
2205 + pinctrl-0 = <&pinctrl_uart5>;
2210 + vbus-supply = <®_usb_otg_vbus>;
2211 + pinctrl-names = "default";
2212 + pinctrl-0 = <&pinctrl_usbotg>;
2213 + disable-over-current;
2218 + vbus-supply = <®_usb_h1_vbus>;
2223 + pinctrl-names = "default";
2224 + pinctrl-0 = <&pinctrl_usdhc3>;
2225 + cd-gpios = <&gpio7 0 0>;
2226 + vmmc-supply = <®_3p3v>;
2230 +++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
2233 + * Copyright 2013 Gateworks Corporation
2235 + * The code contained herein is licensed under the GNU General Public
2236 + * License. You may obtain a copy of the GNU General Public License
2237 + * Version 2 or later at the following locations:
2239 + * http://www.opensource.org/licenses/gpl-license.html
2240 + * http://www.gnu.org/copyleft/gpl.html
2244 + /* these are used by bootloader for disabling nodes */
2248 + ethernet1 = ð1;
2261 + bootargs = "console=ttymxc1,115200";
2265 + compatible = "gpio-leds";
2269 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
2270 + default-state = "on";
2271 + linux,default-trigger = "heartbeat";
2276 + gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
2277 + default-state = "off";
2282 + gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
2283 + default-state = "off";
2288 + reg = <0x10000000 0x40000000>;
2292 + compatible = "pps-gpio";
2293 + gpios = <&gpio1 26 0>;
2298 + compatible = "simple-bus";
2299 + #address-cells = <1>;
2300 + #size-cells = <0>;
2302 + reg_1p0v: regulator@0 {
2303 + compatible = "regulator-fixed";
2305 + regulator-name = "1P0V";
2306 + regulator-min-microvolt = <1000000>;
2307 + regulator-max-microvolt = <1000000>;
2308 + regulator-always-on;
2311 + reg_3p3v: regulator@1 {
2312 + compatible = "regulator-fixed";
2314 + regulator-name = "3P3V";
2315 + regulator-min-microvolt = <3300000>;
2316 + regulator-max-microvolt = <3300000>;
2317 + regulator-always-on;
2320 + reg_usb_h1_vbus: regulator@2 {
2321 + compatible = "regulator-fixed";
2323 + regulator-name = "usb_h1_vbus";
2324 + regulator-min-microvolt = <5000000>;
2325 + regulator-max-microvolt = <5000000>;
2326 + regulator-always-on;
2329 + reg_usb_otg_vbus: regulator@3 {
2330 + compatible = "regulator-fixed";
2332 + regulator-name = "usb_otg_vbus";
2333 + regulator-min-microvolt = <5000000>;
2334 + regulator-max-microvolt = <5000000>;
2335 + gpio = <&gpio3 22 0>;
2336 + enable-active-high;
2341 + compatible = "fsl,imx6q-sabrelite-sgtl5000",
2342 + "fsl,imx-audio-sgtl5000";
2343 + model = "imx6q-sabrelite-sgtl5000";
2344 + ssi-controller = <&ssi1>;
2345 + audio-codec = <&codec>;
2347 + "MIC_IN", "Mic Jack",
2348 + "Mic Jack", "Mic Bias",
2349 + "Headphone Jack", "HP_OUT";
2350 + mux-int-port = <1>;
2351 + mux-ext-port = <4>;
2356 + pinctrl-names = "default";
2357 + pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
2362 + pinctrl-names = "default";
2363 + pinctrl-0 = <&pinctrl_flexcan1>;
2368 + pinctrl-names = "default";
2369 + pinctrl-0 = <&pinctrl_enet>;
2370 + phy-mode = "rgmii";
2371 + phy-reset-gpios = <&gpio1 30 0>;
2376 + pinctrl-names = "default";
2377 + pinctrl-0 = <&pinctrl_gpmi_nand>;
2382 + clock-frequency = <100000>;
2383 + pinctrl-names = "default";
2384 + pinctrl-0 = <&pinctrl_i2c1>;
2387 + eeprom1: eeprom@50 {
2388 + compatible = "atmel,24c02";
2393 + eeprom2: eeprom@51 {
2394 + compatible = "atmel,24c02";
2399 + eeprom3: eeprom@52 {
2400 + compatible = "atmel,24c02";
2405 + eeprom4: eeprom@53 {
2406 + compatible = "atmel,24c02";
2411 + gpio: pca9555@23 {
2412 + compatible = "nxp,pca9555";
2415 + #gpio-cells = <2>;
2419 + compatible = "gw,gsp";
2424 + compatible = "dallas,ds1672";
2430 + clock-frequency = <100000>;
2431 + pinctrl-names = "default";
2432 + pinctrl-0 = <&pinctrl_i2c2>;
2435 + pmic: pfuze100@08 {
2436 + compatible = "fsl,pfuze100";
2441 + regulator-min-microvolt = <300000>;
2442 + regulator-max-microvolt = <1875000>;
2443 + regulator-boot-on;
2444 + regulator-always-on;
2445 + regulator-ramp-delay = <6250>;
2449 + regulator-min-microvolt = <300000>;
2450 + regulator-max-microvolt = <1875000>;
2451 + regulator-boot-on;
2452 + regulator-always-on;
2453 + regulator-ramp-delay = <6250>;
2457 + regulator-min-microvolt = <800000>;
2458 + regulator-max-microvolt = <3950000>;
2459 + regulator-boot-on;
2460 + regulator-always-on;
2464 + regulator-min-microvolt = <400000>;
2465 + regulator-max-microvolt = <1975000>;
2466 + regulator-boot-on;
2467 + regulator-always-on;
2471 + regulator-min-microvolt = <400000>;
2472 + regulator-max-microvolt = <1975000>;
2473 + regulator-boot-on;
2474 + regulator-always-on;
2478 + regulator-min-microvolt = <800000>;
2479 + regulator-max-microvolt = <3300000>;
2482 + swbst_reg: swbst {
2483 + regulator-min-microvolt = <5000000>;
2484 + regulator-max-microvolt = <5150000>;
2488 + regulator-min-microvolt = <1000000>;
2489 + regulator-max-microvolt = <3000000>;
2490 + regulator-boot-on;
2491 + regulator-always-on;
2494 + vref_reg: vrefddr {
2495 + regulator-boot-on;
2496 + regulator-always-on;
2499 + vgen1_reg: vgen1 {
2500 + regulator-min-microvolt = <800000>;
2501 + regulator-max-microvolt = <1550000>;
2504 + vgen2_reg: vgen2 {
2505 + regulator-min-microvolt = <800000>;
2506 + regulator-max-microvolt = <1550000>;
2509 + vgen3_reg: vgen3 {
2510 + regulator-min-microvolt = <1800000>;
2511 + regulator-max-microvolt = <3300000>;
2514 + vgen4_reg: vgen4 {
2515 + regulator-min-microvolt = <1800000>;
2516 + regulator-max-microvolt = <3300000>;
2517 + regulator-always-on;
2520 + vgen5_reg: vgen5 {
2521 + regulator-min-microvolt = <1800000>;
2522 + regulator-max-microvolt = <3300000>;
2523 + regulator-always-on;
2526 + vgen6_reg: vgen6 {
2527 + regulator-min-microvolt = <1800000>;
2528 + regulator-max-microvolt = <3300000>;
2529 + regulator-always-on;
2534 + pciswitch: pex8609@3f {
2535 + compatible = "plx,pex8609";
2539 + pciclkgen: si52147@6b {
2540 + compatible = "sil,si52147";
2546 + clock-frequency = <100000>;
2547 + pinctrl-names = "default";
2548 + pinctrl-0 = <&pinctrl_i2c3>;
2551 + accelerometer: fxos8700@1e {
2552 + compatible = "fsl,fxos8700";
2556 + codec: sgtl5000@0a {
2557 + compatible = "fsl,sgtl5000";
2559 + clocks = <&clks 201>;
2560 + VDDA-supply = <&sw4_reg>;
2561 + VDDIO-supply = <®_3p3v>;
2564 + hdmiin: adv7611@4c {
2565 + compatible = "adi,adv7611";
2569 + touchscreen: egalax_ts@04 {
2570 + compatible = "eeti,egalax_ts";
2572 + interrupt-parent = <&gpio7>;
2573 + interrupts = <12 2>; /* gpio7_12 active low */
2574 + wakeup-gpios = <&gpio7 12 0>;
2577 + videoout: adv7393@2a {
2578 + compatible = "adi,adv7393";
2582 + videoin: adv7180@20 {
2583 + compatible = "adi,adv7180";
2589 + pinctrl-names = "default";
2590 + pinctrl-0 = <&pinctrl_hog>;
2593 + pinctrl_hog: hoggrp {
2595 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
2596 + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
2597 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
2598 + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
2599 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
2600 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
2601 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
2602 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
2603 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
2604 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
2605 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
2606 + MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
2607 + MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
2611 + pinctrl_audmux: audmuxgrp {
2613 + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
2614 + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
2615 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
2616 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
2620 + pinctrl_enet: enetgrp {
2622 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
2623 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
2624 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
2625 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
2626 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
2627 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
2628 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
2629 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
2630 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
2631 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
2632 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
2633 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
2634 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
2635 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
2636 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
2637 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
2641 + pinctrl_flexcan1: flexcan1grp {
2643 + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
2644 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
2648 + pinctrl_gpmi_nand: gpminandgrp {
2650 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
2651 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
2652 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
2653 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
2654 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
2655 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
2656 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
2657 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
2658 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
2659 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
2660 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
2661 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
2662 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
2663 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
2664 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
2665 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
2669 + pinctrl_i2c1: i2c1grp {
2671 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
2672 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
2676 + pinctrl_i2c2: i2c2grp {
2678 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
2679 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
2683 + pinctrl_i2c3: i2c3grp {
2685 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
2686 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
2690 + pinctrl_uart1: uart1grp {
2692 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
2693 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
2697 + pinctrl_uart2: uart2grp {
2699 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
2700 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
2704 + pinctrl_uart5: uart5grp {
2706 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
2707 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
2711 + pinctrl_usbotg: usbotggrp {
2713 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
2717 + pinctrl_usdhc3: usdhc3grp {
2719 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
2720 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
2721 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
2722 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
2723 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
2724 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
2734 + fsl,data-mapping = "spwg";
2735 + fsl,data-width = <18>;
2739 + native-mode = <&timing0>;
2740 + timing0: hsd100pxn1 {
2741 + clock-frequency = <65000000>;
2744 + hback-porch = <220>;
2745 + hfront-porch = <40>;
2746 + vback-porch = <21>;
2747 + vfront-porch = <7>;
2756 + reset-gpio = <&gpio1 29 0>;
2759 + eth1: sky2@8 { /* MAC/PHY on bus 8 */
2760 + compatible = "marvell,sky2";
2765 + fsl,mode = "i2s-slave";
2770 + fsl,mode = "i2s-slave";
2775 + pinctrl-names = "default";
2776 + pinctrl-0 = <&pinctrl_uart1>;
2781 + pinctrl-names = "default";
2782 + pinctrl-0 = <&pinctrl_uart2>;
2787 + pinctrl-names = "default";
2788 + pinctrl-0 = <&pinctrl_uart5>;
2793 + vbus-supply = <®_usb_otg_vbus>;
2794 + pinctrl-names = "default";
2795 + pinctrl-0 = <&pinctrl_usbotg>;
2796 + disable-over-current;
2801 + vbus-supply = <®_usb_h1_vbus>;
2806 + pinctrl-names = "default";
2807 + pinctrl-0 = <&pinctrl_usdhc3>;
2808 + cd-gpios = <&gpio7 0 0>;
2809 + vmmc-supply = <®_3p3v>;