1 From 3f75978b3742157853618c5c6dd4a5f49aa950b1 Mon Sep 17 00:00:00 2001
2 From: Shawn Guo <shawn.guo@linaro.org>
3 Date: Tue, 13 Aug 2013 14:10:29 +0800
4 Subject: [PATCH] ARM: imx6q: use common soc revision helpers
6 It calls imx_set_soc_revision() to set up soc revision in
7 imx6q_init_revision(), and replaces all the occurrences of
8 imx6q_revision() with common helper imx_get_soc_revision().
10 Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
12 arch/arm/mach-imx/clk-imx6q.c | 5 +++--
13 arch/arm/mach-imx/common.h | 1 -
14 arch/arm/mach-imx/mach-imx6q.c | 13 ++++---------
15 3 files changed, 7 insertions(+), 12 deletions(-)
17 --- a/arch/arm/mach-imx/clk-imx6q.c
18 +++ b/arch/arm/mach-imx/clk-imx6q.c
19 @@ -300,7 +300,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
22 /* Audio/video PLL post dividers do not work on i.MX6q revision 1.0 */
23 - if (cpu_is_imx6q() && imx6q_revision() == IMX_CHIP_REVISION_1_0) {
24 + if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_1_0) {
25 post_div_table[1].div = 1;
26 post_div_table[2].div = 1;
27 video_div_table[1].div = 1;
28 @@ -574,7 +574,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
29 clk_register_clkdev(clk[pll4_post_div], "pll4_post_div", NULL);
30 clk_register_clkdev(clk[pll4_audio], "pll4_audio", NULL);
32 - if ((imx6q_revision() != IMX_CHIP_REVISION_1_0) || cpu_is_imx6dl()) {
33 + if ((imx_get_soc_revision() != IMX_CHIP_REVISION_1_0) ||
35 clk_set_parent(clk[ldb_di0_sel], clk[pll5_video_div]);
36 clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]);
38 --- a/arch/arm/mach-imx/common.h
39 +++ b/arch/arm/mach-imx/common.h
40 @@ -73,7 +73,6 @@ extern void mxc_restart(enum reboot_mode, const char *);
41 extern void mxc_arch_reset_init(void __iomem *);
42 extern void mxc_arch_reset_init_dt(void);
43 extern int mx53_revision(void);
44 -extern int imx6q_revision(void);
45 extern int mx53_display_revision(void);
46 extern void imx_set_aips(void __iomem *);
47 extern int mxc_device_init(void);
48 --- a/arch/arm/mach-imx/mach-imx6q.c
49 +++ b/arch/arm/mach-imx/mach-imx6q.c
54 -static u32 chip_revision;
56 -int imx6q_revision(void)
58 - return chip_revision;
61 static void __init imx6q_init_revision(void)
63 u32 rev = imx_anatop_get_digprog();
68 @@ -64,6 +58,7 @@ static void __init imx6q_init_revision(void)
71 mxc_set_cpu_type(rev >> 16 & 0xff);
72 + imx_set_soc_revision(chip_revision);
75 static void imx6q_restart(enum reboot_mode mode, const char *cmd)
77 * WAIT mode is broken on TO 1.0 and 1.1, so there is no point
78 * to run cpuidle on them.
80 - if (imx6q_revision() > IMX_CHIP_REVISION_1_1)
81 + if (imx_get_soc_revision() > IMX_CHIP_REVISION_1_1)
84 if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) {
87 clocksource_of_init();
88 imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",
90 + imx_get_soc_revision());
93 static const char *imx6q_dt_compat[] __initdata = {