target/linux/ifxmips/files/drivers/serial/ifxmips_asc.c

   1 /*
   2  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  17  *
  18  * Copyright (C) 2004 Infineon IFAP DC COM CPE
  19  * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
  20  * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/errno.h>
  25 #include <linux/signal.h>
  26 #include <linux/sched.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/tty.h>
  29 #include <linux/tty_flip.h>
  30 #include <linux/major.h>
  31 #include <linux/string.h>
  32 #include <linux/fcntl.h>
  33 #include <linux/ptrace.h>
  34 #include <linux/ioport.h>
  35 #include <linux/mm.h>
  36 #include <linux/slab.h>
  37 #include <linux/init.h>
  38 #include <linux/circ_buf.h>
  39 #include <linux/serial.h>
  40 #include <linux/serial_core.h>
  41 #include <linux/console.h>
  42 #include <linux/sysrq.h>
  43 #include <linux/irq.h>
  44 #include <linux/platform_device.h>
  45 #include <linux/io.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/bitops.h>
  48
  49 #include <asm/system.h>
  50
  51 #include <ifxmips.h>
  52 #include <ifxmips_irq.h>
  53
  54 #define PORT_IFXMIPSASC  111
  55
  56 #include <linux/serial_core.h>
  57
  58 #define UART_DUMMY_UER_RX 1
  59
  60 static void ifxmipsasc_tx_chars(struct uart_port *port);
  61 extern void prom_printf(const char *fmt, ...);
  62 static struct uart_port ifxmipsasc_port[2];
  63 static struct uart_driver ifxmipsasc_reg;
  64 extern unsigned int ifxmips_get_fpi_hz(void);
  65
  66 static void ifxmipsasc_stop_tx(struct uart_port *port)
  67 {
  68         return;
  69 }
  70
  71 static void ifxmipsasc_start_tx(struct uart_port *port)
  72 {
  73         unsigned long flags;
  74         local_irq_save(flags);
  75         ifxmipsasc_tx_chars(port);
  76         local_irq_restore(flags);
  77         return;
  78 }
  79
  80 static void ifxmipsasc_stop_rx(struct uart_port *port)
  81 {
  82         ifxmips_w32(ASCWHBSTATE_CLRREN, port->membase + IFXMIPS_ASC_WHBSTATE);
  83 }
  84
  85 static void ifxmipsasc_enable_ms(struct uart_port *port)
  86 {
  87 }
  88
  89 #include <linux/version.h>
  90
  91 static void ifxmipsasc_rx_chars(struct uart_port *port)
  92 {
  93 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 26))
  94         struct tty_struct *tty = port->info->port.tty;
  95 #else
  96         struct tty_struct *tty = port->info->tty;
  97 #endif
  98         unsigned int ch = 0, rsr = 0, fifocnt;
  99
 100         fifocnt = ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_RXFFLMASK;
 101         while (fifocnt--) {
 102                 u8 flag = TTY_NORMAL;
 103                 ch = ifxmips_r32(port->membase + IFXMIPS_ASC_RBUF);
 104                 rsr = (ifxmips_r32(port->membase + IFXMIPS_ASC_STATE) & ASCSTATE_ANY) | UART_DUMMY_UER_RX;
 105                 tty_flip_buffer_push(tty);
 106                 port->icount.rx++;
 107
 108                 /*
 109                  * Note that the error handling code is
 110                  * out of the main execution path
 111                  */
 112                 if (rsr & ASCSTATE_ANY) {
 113                         if (rsr & ASCSTATE_PE) {
 114                                 port->icount.parity++;
 115                                 ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRPE, port->membase + IFXMIPS_ASC_WHBSTATE);
 116                         } else if (rsr & ASCSTATE_FE) {
 117                                 port->icount.frame++;
 118                                 ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRFE, port->membase + IFXMIPS_ASC_WHBSTATE);
 119                         }
 120                         if (rsr & ASCSTATE_ROE) {
 121                                 port->icount.overrun++;
 122                                 ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRROE, port->membase + IFXMIPS_ASC_WHBSTATE);
 123                         }
 124
 125                         rsr &= port->read_status_mask;
 126
 127                         if (rsr & ASCSTATE_PE)
 128                                 flag = TTY_PARITY;
 129                         else if (rsr & ASCSTATE_FE)
 130                                 flag = TTY_FRAME;
 131                 }
 132
 133                 if ((rsr & port->ignore_status_mask) == 0)
 134                         tty_insert_flip_char(tty, ch, flag);
 135
 136                 if (rsr & ASCSTATE_ROE)
 137                         /*
 138                          * Overrun is special, since it's reported
 139                          * immediately, and doesn't affect the current
 140                          * character
 141                          */
 142                         tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 143         }
 144         if (ch != 0)
 145                 tty_flip_buffer_push(tty);
 146         return;
 147 }
 148
 149
 150 static void ifxmipsasc_tx_chars(struct uart_port *port)
 151 {
 152         struct circ_buf *xmit = &port->info->xmit;
 153         if (uart_tx_stopped(port)) {
 154                 ifxmipsasc_stop_tx(port);
 155                 return;
 156         }
 157
 158         while (((ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK)
 159                         >> ASCFSTAT_TXFFLOFF) != TXFIFO_FULL) {
 160                 if (port->x_char) {
 161                         ifxmips_w32(port->x_char, port->membase + IFXMIPS_ASC_TBUF);
 162                         port->icount.tx++;
 163                         port->x_char = 0;
 164                         continue;
 165                 }
 166
 167                 if (uart_circ_empty(xmit))
 168                         break;
 169
 170                 ifxmips_w32(port->info->xmit.buf[port->info->xmit.tail], port->membase + IFXMIPS_ASC_TBUF);
 171                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 172                 port->icount.tx++;
 173         }
 174
 175         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 176                 uart_write_wakeup(port);
 177 }
 178
 179 static irqreturn_t ifxmipsasc_tx_int(int irq, void *_port)
 180 {
 181         struct uart_port *port = (struct uart_port *)_port;
 182         ifxmips_w32(ASC_IRNCR_TIR, port->membase + IFXMIPS_ASC_IRNCR);
 183         ifxmipsasc_start_tx(port);
 184         ifxmips_mask_and_ack_irq(irq);
 185         return IRQ_HANDLED;
 186 }
 187
 188 static irqreturn_t ifxmipsasc_er_int(int irq, void *_port)
 189 {
 190         struct uart_port *port = (struct uart_port *)_port;
 191         /* clear any pending interrupts */
 192         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRPE |
 193                         ASCWHBSTATE_CLRFE | ASCWHBSTATE_CLRROE, port->membase + IFXMIPS_ASC_WHBSTATE);
 194         return IRQ_HANDLED;
 195 }
 196
 197 static irqreturn_t ifxmipsasc_rx_int(int irq, void *_port)
 198 {
 199         struct uart_port *port = (struct uart_port *)_port;
 200         ifxmips_w32(ASC_IRNCR_RIR, port->membase + IFXMIPS_ASC_IRNCR);
 201         ifxmipsasc_rx_chars((struct uart_port *)port);
 202         ifxmips_mask_and_ack_irq(irq);
 203         return IRQ_HANDLED;
 204 }
 205
 206 static unsigned int ifxmipsasc_tx_empty(struct uart_port *port)
 207 {
 208         int status;
 209         status = ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK;
 210         return status ? 0 : TIOCSER_TEMT;
 211 }
 212
 213 static unsigned int ifxmipsasc_get_mctrl(struct uart_port *port)
 214 {
 215         return TIOCM_CTS | TIOCM_CAR | TIOCM_DSR;
 216 }
 217
 218 static void ifxmipsasc_set_mctrl(struct uart_port *port, u_int mctrl)
 219 {
 220 }
 221
 222 static void ifxmipsasc_break_ctl(struct uart_port *port, int break_state)
 223 {
 224 }
 225
 226 static int ifxmipsasc_startup(struct uart_port *port)
 227 {
 228         unsigned long flags;
 229         int retval;
 230
 231         port->uartclk = ifxmips_get_fpi_hz();
 232
 233         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CLC) & ~IFXMIPS_ASC_CLC_DISS, port->membase + IFXMIPS_ASC_CLC);
 234         ifxmips_w32(((ifxmips_r32(port->membase + IFXMIPS_ASC_CLC) & ~ASCCLC_RMCMASK)) | (1 << ASCCLC_RMCOFFSET), port->membase + IFXMIPS_ASC_CLC);
 235         ifxmips_w32(0, port->membase + IFXMIPS_ASC_PISEL);
 236         ifxmips_w32(((TXFIFO_FL << ASCTXFCON_TXFITLOFF) & ASCTXFCON_TXFITLMASK) | ASCTXFCON_TXFEN | ASCTXFCON_TXFFLU, port->membase + IFXMIPS_ASC_TXFCON);
 237         ifxmips_w32(((RXFIFO_FL << ASCRXFCON_RXFITLOFF) & ASCRXFCON_RXFITLMASK) | ASCRXFCON_RXFEN | ASCRXFCON_RXFFLU, port->membase + IFXMIPS_ASC_RXFCON);
 238         wmb();
 239         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) | ASCCON_M_8ASYNC | ASCCON_FEN | ASCCON_TOEN | ASCCON_ROEN, port->membase + IFXMIPS_ASC_CON);
 240
 241         local_irq_save(flags);
 242
 243         retval = request_irq(port->irq, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
 244         if (retval) {
 245                 printk(KERN_ERR "failed to request ifxmipsasc_tx_int\n");
 246                 return retval;
 247         }
 248
 249         retval = request_irq(port->irq + 2, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
 250         if (retval) {
 251                 printk(KERN_ERR "failed to request ifxmipsasc_rx_int\n");
 252                 goto err1;
 253         }
 254
 255         retval = request_irq(port->irq + 3, ifxmipsasc_er_int, IRQF_DISABLED, "asc_er", port);
 256         if (retval) {
 257                 printk(KERN_ERR "failed to request ifxmipsasc_er_int\n");
 258                 goto err2;
 259         }
 260
 261         ifxmips_w32(ASC_IRNREN_RX_BUF | ASC_IRNREN_TX_BUF | ASC_IRNREN_ERR | ASC_IRNREN_TX, port->membase + IFXMIPS_ASC_IRNREN);
 262
 263         local_irq_restore(flags);
 264         return 0;
 265
 266 err2:
 267         free_irq(port->irq + 2, port);
 268 err1:
 269         free_irq(port->irq, port);
 270         local_irq_restore(flags);
 271         return retval;
 272 }
 273
 274 static void ifxmipsasc_shutdown(struct uart_port *port)
 275 {
 276         free_irq(port->irq, port);
 277         free_irq(port->irq + 2, port);
 278         free_irq(port->irq + 3, port);
 279
 280         ifxmips_w32(0, port->membase + IFXMIPS_ASC_CON);
 281         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_RXFCON) | ASCRXFCON_RXFFLU, port->membase + IFXMIPS_ASC_RXFCON);
 282         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_RXFCON) & ~ASCRXFCON_RXFEN, port->membase + IFXMIPS_ASC_RXFCON);
 283         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_TXFCON) | ASCTXFCON_TXFFLU, port->membase + IFXMIPS_ASC_TXFCON);
 284         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_TXFCON) & ~ASCTXFCON_TXFEN, port->membase + IFXMIPS_ASC_TXFCON);
 285 }
 286
 287 static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new, struct ktermios *old)
 288 {
 289         unsigned int cflag;
 290         unsigned int iflag;
 291         unsigned int quot;
 292         unsigned int baud;
 293         unsigned int con = 0;
 294         unsigned long flags;
 295
 296         cflag = new->c_cflag;
 297         iflag = new->c_iflag;
 298
 299         switch (cflag & CSIZE) {
 300         case CS7:
 301                 con = ASCCON_M_7ASYNC;
 302                 break;
 303
 304         case CS5:
 305         case CS6:
 306         default:
 307                 con = ASCCON_M_8ASYNC;
 308                 break;
 309         }
 310
 311         if (cflag & CSTOPB)
 312                 con |= ASCCON_STP;
 313
 314         if (cflag & PARENB) {
 315                 if (!(cflag & PARODD))
 316                         con &= ~ASCCON_ODD;
 317                 else
 318                         con |= ASCCON_ODD;
 319         }
 320
 321         port->read_status_mask = ASCSTATE_ROE;
 322         if (iflag & INPCK)
 323                 port->read_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
 324
 325         port->ignore_status_mask = 0;
 326         if (iflag & IGNPAR)
 327                 port->ignore_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
 328
 329         if (iflag & IGNBRK) {
 330                 /*
 331                  * If we're ignoring parity and break indicators,
 332                  * ignore overruns too (for real raw support).
 333                  */
 334                 if (iflag & IGNPAR)
 335                         port->ignore_status_mask |= ASCSTATE_ROE;
 336         }
 337
 338         if ((cflag & CREAD) == 0)
 339                 port->ignore_status_mask |= UART_DUMMY_UER_RX;
 340
 341         /* set error signals  - framing, parity  and overrun, enable receiver */
 342         con |= ASCCON_FEN | ASCCON_TOEN | ASCCON_ROEN;
 343
 344         local_irq_save(flags);
 345
 346         /* set up CON */
 347         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) | con, port->membase + IFXMIPS_ASC_CON);
 348
 349         /* Set baud rate - take a divider of 2 into account */
 350         baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
 351         quot = uart_get_divisor(port, baud);
 352         quot = quot / 2 - 1;
 353
 354         /* disable the baudrate generator */
 355         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) & ~ASCCON_R, port->membase + IFXMIPS_ASC_CON);
 356
 357         /* make sure the fractional divider is off */
 358         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) & ~ASCCON_FDE, port->membase + IFXMIPS_ASC_CON);
 359
 360         /* set up to use divisor of 2 */
 361         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) & ~ASCCON_BRS, port->membase + IFXMIPS_ASC_CON);
 362
 363         /* now we can write the new baudrate into the register */
 364         ifxmips_w32(quot, port->membase + IFXMIPS_ASC_BG);
 365
 366         /* turn the baudrate generator back on */
 367         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) | ASCCON_R, port->membase + IFXMIPS_ASC_CON);
 368
 369         /* enable rx */
 370         ifxmips_w32(ASCWHBSTATE_SETREN, port->membase + IFXMIPS_ASC_WHBSTATE);
 371
 372         local_irq_restore(flags);
 373 }
 374
 375 static const char *ifxmipsasc_type(struct uart_port *port)
 376 {
 377         if (port->type == PORT_IFXMIPSASC) {
 378                 if (port->membase == (void *)IFXMIPS_ASC_BASE_ADDR)
 379                         return "asc0";
 380                 else
 381                         return "asc1";
 382         } else {
 383                 return NULL;
 384         }
 385 }
 386
 387 static void ifxmipsasc_release_port(struct uart_port *port)
 388 {
 389 }
 390
 391 static int ifxmipsasc_request_port(struct uart_port *port)
 392 {
 393         return 0;
 394 }
 395
 396 static void ifxmipsasc_config_port(struct uart_port *port, int flags)
 397 {
 398         if (flags & UART_CONFIG_TYPE) {
 399                 port->type = PORT_IFXMIPSASC;
 400                 ifxmipsasc_request_port(port);
 401         }
 402 }
 403
 404 static int ifxmipsasc_verify_port(struct uart_port *port, struct serial_struct *ser)
 405 {
 406         int ret = 0;
 407         if (ser->type != PORT_UNKNOWN && ser->type != PORT_IFXMIPSASC)
 408                 ret = -EINVAL;
 409         if (ser->irq < 0 || ser->irq >= NR_IRQS)
 410                 ret = -EINVAL;
 411         if (ser->baud_base < 9600)
 412                 ret = -EINVAL;
 413         return ret;
 414 }
 415
 416 static struct uart_ops ifxmipsasc_pops = {
 417         .tx_empty =     ifxmipsasc_tx_empty,
 418         .set_mctrl =    ifxmipsasc_set_mctrl,
 419         .get_mctrl =    ifxmipsasc_get_mctrl,
 420         .stop_tx =      ifxmipsasc_stop_tx,
 421         .start_tx =     ifxmipsasc_start_tx,
 422         .stop_rx =      ifxmipsasc_stop_rx,
 423         .enable_ms =    ifxmipsasc_enable_ms,
 424         .break_ctl =    ifxmipsasc_break_ctl,
 425         .startup =      ifxmipsasc_startup,
 426         .shutdown =     ifxmipsasc_shutdown,
 427         .set_termios =  ifxmipsasc_set_termios,
 428         .type =         ifxmipsasc_type,
 429         .release_port = ifxmipsasc_release_port,
 430         .request_port = ifxmipsasc_request_port,
 431         .config_port =  ifxmipsasc_config_port,
 432         .verify_port =  ifxmipsasc_verify_port,
 433 };
 434
 435 static struct uart_port ifxmipsasc_port[2] = {
 436         {
 437                 .membase =              (void *)IFXMIPS_ASC_BASE_ADDR,
 438                 .mapbase =              IFXMIPS_ASC_BASE_ADDR,
 439                 .iotype =               SERIAL_IO_MEM,
 440                 .irq =                  IFXMIPSASC_TIR(0),
 441                 .uartclk =              0,
 442                 .fifosize =             16,
 443                 .type =                 PORT_IFXMIPSASC,
 444                 .ops =                  &ifxmipsasc_pops,
 445                 .flags =                ASYNC_BOOT_AUTOCONF,
 446                 .line =                 0
 447         }, {
 448                 .membase =              (void *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF),
 449                 .mapbase =              IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF,
 450                 .iotype =               SERIAL_IO_MEM,
 451                 .irq =                  IFXMIPSASC_TIR(1),
 452                 .uartclk =              0,
 453                 .fifosize =             16,
 454                 .type =                 PORT_IFXMIPSASC,
 455                 .ops =                  &ifxmipsasc_pops,
 456                 .flags =                ASYNC_BOOT_AUTOCONF,
 457                 .line =                 1
 458         }
 459 };
 460
 461 static void ifxmipsasc_console_write(struct console *co, const char *s, u_int count)
 462 {
 463         int port = co->index;
 464         int i, fifocnt;
 465         unsigned long flags;
 466         local_irq_save(flags);
 467         for (i = 0; i < count; i++) {
 468                 do {
 469                         fifocnt = (ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
 470                                 >> ASCFSTAT_TXFFLOFF;
 471                 } while (fifocnt == TXFIFO_FULL);
 472
 473                 if (s[i] == '\0')
 474                         break;
 475
 476                 if (s[i] == '\n') {
 477                         ifxmips_w32('\r', (u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
 478                         do {
 479                                 fifocnt = (ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
 480                                         >> ASCFSTAT_TXFFLOFF;
 481                         } while (fifocnt == TXFIFO_FULL);
 482                 }
 483                 ifxmips_w32(s[i], (u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
 484         }
 485
 486         local_irq_restore(flags);
 487 }
 488
 489 static int __init ifxmipsasc_console_setup(struct console *co, char *options)
 490 {
 491         int port = co->index;
 492         int baud = 115200;
 493         int bits = 8;
 494         int parity = 'n';
 495         int flow = 'n';
 496         ifxmipsasc_port[port].uartclk = ifxmips_get_fpi_hz();
 497         ifxmipsasc_port[port].type = PORT_IFXMIPSASC;
 498         if (options)
 499                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 500         return uart_set_options(&ifxmipsasc_port[port], co, baud, parity, bits, flow);
 501 }
 502
 503 static struct console ifxmipsasc_console[2] =
 504 {
 505         {
 506                 .name =         "ttyS",
 507                 .write =                ifxmipsasc_console_write,
 508                 .device =               uart_console_device,
 509                 .setup =                ifxmipsasc_console_setup,
 510                 .flags =                CON_PRINTBUFFER,
 511                 .index =                0,
 512                 .data =         &ifxmipsasc_reg,
 513         }, {
 514                 .name =         "ttyS",
 515                 .write =        ifxmipsasc_console_write,
 516                 .device =       uart_console_device,
 517                 .setup =        ifxmipsasc_console_setup,
 518                 .flags =        CON_PRINTBUFFER,
 519                 .index =        1,
 520                 .data =         &ifxmipsasc_reg,
 521         }
 522 };
 523
 524 static int __init ifxmipsasc_console_init(void)
 525 {
 526         register_console(&ifxmipsasc_console[0]);
 527         register_console(&ifxmipsasc_console[1]);
 528         return 0;
 529 }
 530 console_initcall(ifxmipsasc_console_init);
 531
 532 static struct uart_driver ifxmipsasc_reg = {
 533         .owner =        THIS_MODULE,
 534         .driver_name =  "serial",
 535         .dev_name =     "ttyS",
 536         .major =        TTY_MAJOR,
 537         .minor =        64,
 538         .nr =           2,
 539         .cons =         &ifxmipsasc_console[1],
 540 };
 541
 542 int __init ifxmipsasc_init(void)
 543 {
 544         int ret;
 545         uart_register_driver(&ifxmipsasc_reg);
 546         ret = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[0]);
 547         ret = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[1]);
 548         return 0;
 549 }
 550
 551 void __exit ifxmipsasc_exit(void)
 552 {
 553         uart_unregister_driver(&ifxmipsasc_reg);
 554 }
 555
 556 module_init(ifxmipsasc_init);
 557 module_exit(ifxmipsasc_exit);
 558
 559 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
 560 MODULE_DESCRIPTION("MIPS IFXMips serial port driver");
 561 MODULE_LICENSE("GPL");